DSPIC33EP128GM310-H/BG - 16-bit DSC, 128KB Flash, 121-TFBGA | Microchip
MPN: DSPIC33EP128GM310-H/BG ✓ Active| Qty | Unit Price | Extended |
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DSPIC33EP128GM310-H/BG Overview
A digital signal controller is a hybrid device that combines the computational architecture of a microcontroller - Harvard bus, interrupt-driven peripherals, on-chip Flash - with DSP features such as a hardware multiply-accumulate unit, divide support, and fractional addressing. Within the power management hierarchy of embedded systems, DSCs sit between general-purpose MCUs and dedicated DSPs, offering single-cycle MAC operations while retaining deterministic real-time control peripherals such as motor-control PWM modules.
Key features of this part include 128 KB of self-programmable Flash, 16 KB of SRAM, up to 85 general-purpose I/O, 12 motor-control PWM channels, 8 input capture / 8 output compare channels, 4 quadrature encoder interfaces, 4 on-chip operational amplifiers, and a Charge Time Measurement Unit (CTMU). These peripherals target precision motor control, digital power conversion, and sensor conditioning.
The dsPIC33E core integrates an enhanced DSP engine with dual 40-bit accumulators and hardware division, enabling control-loop mathematics without software library overhead. The GM310 variant belongs to the general-purpose dsPIC33EPGM family; the same silicon family spans 64 KB, 128 KB, and 256 KB Flash options in identical packages, giving designers a memory-scaling path without board redesign. The -H/BG ordering option denotes the automotive AEC-Q100 qualified temperature variant packaged in 121-TFBGA.
Typical applications include high-precision motor control for industrial drives and robotics, digital power supplies (PFC and LLC control), and automotive auxiliary systems requiring AEC-Q100 qualification. The 4 op-amps and CTMU make it well suited for current-sense amplification and capacitive or resistive sensing.
For design, use ICSP with any matched PGECx/PGEDx pair - programming requires the selected pair (for example PGEC2/PGED2) to be wired together - and connect all VDD/VSS ball pairs. Package selection note: this H-variant may derate maximum MIPS at extreme temperatures; confirm speed-versus-temperature curves in the manufacturer datasheet.
This page synthesizes distributor data, same-family drop-in alternatives, and practical design guidance not consolidated in the manufacturer datasheet.
Drop-in alternatives for DSPIC33EP128GM310-H/BG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM310-H/BG (same form factor and footprint) — differing in Core, Qualification, On-chip Op-Amps, Operating Temperature, Quadrature Encoder Interfaces.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP128GM310-E/BG
✅ Drop-In✓ In Stock
$4.55 / Unit
View Datasheet →DSPIC33EP256GM310-H/BG
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$5.95 / Unit
View Datasheet →DSPIC33EP64GM310-H/BG
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM710-H/BG
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1 / Unit
View Datasheet →DSPIC33EP128GM310-H/BG Maximum Ratings & Electrical Characteristics
| Core | dsPIC33E 16-bit DSC |
| Core Speed | 70 MIPS |
| Flash Memory | 128 KB (43K x 24) |
| SRAM | 16 KB |
| Supply Voltage | 3.3 V |
| I/O Count | 85 |
| Motor-Control PWM Channels | 12 |
| Input Capture / Output Compare | 8 / 8 |
| Quadrature Encoder Interfaces | 4 |
| On-chip Op-Amps | 4 |
| CTMU | Yes |
| Package | 121-TFBGA (10x10 mm) |
| Operating Temperature | -40C to +150C |
| Qualification | Automotive, AEC-Q100 |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Debug Interface | ICSP / ICJTAG, multiple PGECx/PGEDx pairs |
DSPIC33EP128GM310-H/BG 121-tfbga (10x10 mm) Pin Configuration Guide
Pin configuration for DSPIC33EP128GM310-H/BG (121-tfbga (10x10 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM310-H/BG.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM310-H/BG is suitable for 6 applications: Precision Motor Control (FOC Drives), Digital Power Conversion, Automotive Auxiliary Systems, Sensor Conditioning and CTMU Measurement, Industrial Automation and Robotics, Portable and Embedded Instrumentation.
Precision Motor Control (FOC Drives)
The DSPIC33EP128GM310-H/BG fits high-precision motor control because its dsPIC33E core delivers up to 70 MIPS with single-cycle MAC operations, executing field-oriented control (FOC) loops at PWM frequencies of 20 kHz and above with ample cycle budget. The 12 motor-control PWM channels provide complementary outputs with hardware dead-time insertion, while the 4 quadrature encoder interfaces directly decode position feedback from encoders. The 4 on-chip op-amps amplify shunt-resistor current signals internally, reducing external BOM. Typical usage: PWM drives the inverter bridge, ADC samples phase currents synchronized to PWM triggers, and the DSP engine runs Clarke/Park transforms each cycle. The trade-off is that 128 KB Flash bounds table storage for very complex trajectories - verify code size before finalizing memory selection.
Recommended
Digital Power Conversion
For digital power supplies - PFC, LLC, and phase-shifted full-bridge stages - the DSPIC33EP128GM310-H/BG provides the deterministic control timing that digital power demands. The 12 motor-control PWM channels support phase-shifted and complementary topologies with resolution fine enough for high-frequency converters, and the 8 input capture channels timestamp fast fault and current events. The DSP engine executes compensator (PI/PID) math in a fraction of the switching period. In use, the ADC is triggered by PWM at the midpoint of each cycle to sample mid-rail current with minimal switching noise, and duty or phase commands update within the same period. Its AEC-Q100 qualification makes it suitable for automotive on-board charger and DC-DC subsystems. Confirm speed-temperature derating for high-ambient automotive enclosures.
Recommended
Automotive Auxiliary Systems
The -H/BG ordering option carries AEC-Q100 qualification and -40C to +150C operation per distributor data (JLCPCB, Hotenda), making this DSC appropriate for automotive auxiliary electronics such as pump and fan control, seat and actuator drives, window-lift modules, and sensor hubs that sit near heat sources. The 3.3 V 121-TFBGA package with 85 I/O integrates relay/PWM outputs, LIN/CAN-class serial connectivity via UART/ECAN peripherals, and the CTMU for resistive or capacitive sensing of switches and fluid levels. In deployment, the multiple PGECx/PGEDx pairs simplify in-board reprogramming for end-of-line calibration. The engineering consideration is thermal: near the +150C ceiling the allowable MIPS may derate, so verify the datasheet speed-temperature table against your worst-case under-hood ambient before locking the clock plan.
Recommended
Sensor Conditioning and CTMU Measurement
The DSPIC33EP128GM310-H/BG suits analog sensor conditioning because it integrates 4 operational amplifiers and the Charge Time Measurement Unit (CTMU) directly on-chip. The op-amps can be configured as gain stages or comparators for shunt-current, thermistor, and bridge-sensor front ends, eliminating external amplifier ICs and their offset/error budgets. The CTMU provides precision constant-current sources for measuring resistance and capacitance - useful for touch keys, level sensing, and cable/PCB fault detection. In a typical signal chain, the op-amp output routes internally to the ADC, keeping analog traces on-chip and improving noise immunity. The 85 I/O supports multiplexed sensor arrays. Design consideration: configure op-amp bandwidth and ADC acquisition time per the family reference manual to avoid settling errors at high sampling rates.
Recommended
Industrial Automation and Robotics
In industrial automation nodes - servo axes, conveyor drives, and robotics joint controllers - the DSPIC33EP128GM310-H/BG combines real-time control peripherals with DSP throughput. The 4 QEI modules decode four encoder axes simultaneously, the 8 output compare channels generate precise timing events, and up to 85 I/O manage limit switches, safety interlocks, and HMI signals. The 70 MIPS DSP engine closes servo current/velocity loops at multi-kHz rates while a higher-level protocol stack runs on the same core. Firmware typically structures as an ISR-driven fast loop (current) plus a background slow loop (trajectory, communications). The 128 KB Flash accommodates control firmware plus a bootloader with room to spare for most single-axis nodes; multi-axis coordinators should evaluate the 256 KB family member. AEC-Q100 qualification also benefits vibration- and temperature-stressed factory environments.
Recommended
Portable and Embedded Instrumentation
For embedded instrumentation - handheld analyzers, data loggers, and test fixtures - the DSPIC33EP128GM310-H/BG offers DSP signal processing (FFT, filtering) alongside general-purpose control in one 3.3 V device. The hardware DSP engine accelerates windowed FFT and FIR filtering for vibration or acoustic analysis, while 16 KB SRAM buffers acquisition data. The CTMU supports self-calibration of resistive touch interfaces used on instrument panels, and UART/SPI/I2C connectivity links the DSC to displays, storage, and host PCs. The compact 10x10 mm 121-TFBGA conserves board area in portable enclosures, though BGA assembly requires reflow capability rather than hand soldering - a consideration for low-volume instrument builds. Designers should budget Flash for both the acquisition engine and any UI/display driver code when choosing between 64/128/256 KB family variants.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM310-H/BG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP128GM310-E/BG | DSPIC33EP256GM310-H/BG | DSPIC33EP64GM310-H/BG |
|---|---|---|---|---|
| Package | 121-TFBGA (10x10) | 121-TFBGA (10x10) - same | 121-TFBGA (10x10) - same | 121-TFBGA (10x10) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 128 KB (43K x 24) | 128 KB (43K x 24) | 256 KB | 64 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB |
| Core Speed | 70 MIPS | 60 MIPS (per DigiKey listing) | 70 MIPS | 70 MIPS |
| Motor-Control PWM Channels | 12 | 12 | 12 | 12 |
| I/O Count | 85 | 85 | 85 | 85 |
Key Differentiators
- Widest automotive temperature and qualification corner in the GM310 family (vs DSPIC33EP128GM310-E/BG)
- Balanced memory-to-cost point in family (vs DSPIC33EP256GM310-H/BG)
- Integrated analog reduces BOM (vs DSPIC33EP64GM310-H/BG)
Design Notes
The 121-TFBGA (10x10 mm) package requires reflow soldering - hand soldering is not practical. Follow Microchip's recommended BGA land pattern (typically 0.45-0.5 mm pads on 0.8 mm pitch; confirm in the datasheet package outline drawing) and provide all VDD/VSS ball pairs with local decoupling (100 nF ceramic within 2 mm of each supply ball pair, plus bulk capacitance per power tree). A 4-layer board with a solid ground plane under the BGA field simplifies fan-out and improves EMI and signal integrity for the high-speed PGECx/PGEDx and oscillator traces.
Programming pitfall: the dsPIC33EP128GM310 exposes multiple PGECx/PGEDx pairs, and ICSP requires a matched pair - if PGEC2 is wired to ICSPCLK, ICSPDAT must connect to PGED2 (per NSDSP support documentation). Mismatching a pair blocks programming and debugging. Also connect ALL VDD and VSS pins; leaving one supply pair floating causes erratic behavior. Keep MCLR pulled up through a resistor to the programming rail and reserve access to one PGEC/PGED pair plus MCLR as test points for production programming.
The device operates from a 3.3 V supply. Estimated current draw: at 70 MIPS with all peripherals active, core current is on the order of tens of mA (derive exact figure from the datasheet current-versus-MIPS table) - size the 3.3 V rail accordingly and include brown-out configuration so the DSC resets cleanly during supply dips. For automotive -H variants operating at elevated ambient, verify the maximum MIPS against the speed-temperature derating table in the latest datasheet before finalizing the oscillator plan; do not assume 70 MIPS is valid at the +150C corner.
Compliance Information
RoHS compliant per JLCPCB listing. Automotive AEC-Q100 qualification per Hotenda product listing. REACH and conflict-minerals status not stated in provided data.
