DSPIC33EP128GM604-I/ML - 70 MIPS DSC, 128KB Flash, 44-QFN | Microchip
MPN: DSPIC33EP128GM604-I/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.42 | $9.42 |
| 10 | $8.51 | $85.10 |
| 100 | $7.34 | $734.00 |
| 500 | $6.55 | $3,275.00 |
| 1,000 | $5.95 | $5,950.00 |
DSPIC33EP128GM604-I/ML Overview
A Digital Signal Controller (DSC) is a hybrid device that combines the deterministic interrupt response and peripheral integration of a microcontroller with the hard real-time signal-processing throughput of a Digital Signal Processor (DSP). The dsPIC33EP family implements the DSC concept on a 3.3V CMOS process with a 16-bit data path, dual 40-bit accumulators, and a single-cycle 16x16 MAC. In the broader taxonomy, a DSC sits between a microcontroller (MCU) and a Digital Signal Processor (DSP), under the power-management and embedded-control hierarchy that includes motor-control specific variants.
Key features include 128 KB Flash program memory with ECC, 16 KB SRAM, a 12-bit ADC at up to 1.1 Msps with up to 18 analog channels, four op-amps and four comparators on-chip, two 12-bit DACs, a 16-bit PWM with 8/8 PWM channels, two quadrature encoder interfaces (QEI), four DMA channels, and a CAN 2.0B module. The CPU runs at 70 MIPS (60 MHz) with a 33 ns instruction cycle.
The device integrates 4 operational amplifiers configurable as inverting or non-inverting gain blocks, eliminating external analog front-end components. With 12-bit ADC throughput at 1.1 Msps and dedicated PWM channels with complementary mode, dead-time control, and 7.5 ns PWM resolution, the architecture targets high-precision motor control and digital power conversion loops.
Typical applications include field-oriented control (FOC) of 3-phase PMSM and BLDC motors, single- and multi-shunt current sensing for sensorless drives, digital switched-mode power supplies, photovoltaic inverters, and CAN-connected industrial automation nodes. The on-chip op-amps directly interface to shunt resistors, reducing BOM and PCB area.
When designing with this device, leave sufficient ground copper under the exposed pad (EP) for thermal dissipation - the EP must be soldered to the PCB thermal land to meet datasheet thermal specifications. Allocate at least four 25 µm x 25 µm thermal vias in the EP land to a bottom-side copper pour.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical PCB-layout guidance not found in the manufacturer datasheet alone.
Drop-in alternatives for DSPIC33EP128GM604-I/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM604-I/ML (same form factor and footprint) — differing in Package, Operating Temperature, Program Memory (Flash), Core, RAM.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP256GM604-I/ML
✅ Drop-In✓ In Stock
$4.9 / Unit
View Datasheet →DSPIC33EP256GM604T-I/ML
✅ Drop-In✓ In Stock
$3.98 / Unit
View Datasheet →DSPIC33EP128GM604-I/ML Maximum Ratings & Electrical Characteristics
| Core | dsPIC33E DSC (16-bit modified Harvard with DSP) |
| CPU Architecture | 16-bit DSC |
| Maximum CPU Speed | 70 MIPS |
| System Clock Frequency | 60 MHz |
| Instruction Cycle | 33 ns |
| Program Memory (Flash) | 128 KB |
| RAM | 16 KB |
| Operating Voltage | 3.0 V to 3.6 V |
| ADC | 12-bit, 1.1 Msps, up to 18 channels |
| DAC | 2 x 12-bit |
| Op-Amps | 4 on-chip |
| Comparators | 4 on-chip |
| PWM Channels | 8/8 (4 complementary pairs) |
| QEI Modules | 2 |
| DMA Channels | 4 |
| Communication | CAN 2.0B, UART, SPI, I2C |
| Package | 44-pin QFN-EP (8x8 mm) |
| Operating Temperature | -40C to +85C (industrial) |
| Mounting Type | Surface Mount |
| RoHS | Compliant |
DSPIC33EP128GM604-I/ML Pin Configuration
| Pin 1 | RP15/PWM4H/PMCS1 — Remappable I/O / PWM4 high-side / peripheral |
| Pin 2 | RP14/PWM4L — Remappable I/O / PWM4 low-side |
| Pin 3 | RP13/PWM3H — Remappable I/O / PWM3 high-side |
| Pin 4 | RP12/PWM3L — Remappable I/O / PWM3 low-side |
| Pin 5 | RP11/PWM2H — Remappable I/O / PWM2 high-side |
| Pin 6 | RP10/PWM2L — Remappable I/O / PWM2 low-side |
| Pin 7 | RP9/PWM1H — Remappable I/O / PWM1 high-side |
| Pin 8 | RP8/PWM1L — Remappable I/O / PWM1 low-side |
| Pin 9 | VSS — Digital ground |
| Pin 10 | VDD — Digital supply (3.3 V) |
| Pin 11 | OSC1/CLKIN — Crystal oscillator input / external clock |
| Pin 12 | OSC2/CLKOUT — Crystal oscillator output |
| Pin 13 | RP7/AN7 — Remappable I/O / ADC analog input |
| Pin 14 | RP6/AN6/OCFA — Remappable I/O / ADC input / output compare fault A |
| Pin 15 | RP5/AN5 — Remappable I/O / ADC analog input |
| Pin 16 | RP4/AN4 — Remappable I/O / ADC analog input |
| Pin 17 | RP3/AN3 — Remappable I/O / ADC analog input |
| Pin 18 | RP2/AN2 — Remappable I/O / ADC analog input |
| Pin 19 | RP1/AN1 — Remappable I/O / ADC analog input |
| Pin 20 | AN0 — ADC analog input 0 |
| Pin 21 | AVSS — Analog ground |
| Pin 22 | AVDD — Analog supply (3.3 V) |
| Pin 23 | C1IN-/C2IN-/C3IN-/C4IN- — Comparator negative input |
| Pin 24 | C1OUT — Comparator 1 output |
| Pin 25 | C2OUT — Comparator 2 output |
| Pin 26 | C3OUT — Comparator 3 output |
| Pin 27 | C4OUT — Comparator 4 output |
| Pin 28 | PWM5H/RP20 — PWM5 high-side / remappable I/O |
| Pin 29 | PWM5L/RP21 — PWM5 low-side / remappable I/O |
| Pin 30 | PWM6H/RP22 — PWM6 high-side / remappable I/O |
| Pin 31 | PWM6L/RP23 — PWM6 low-side / remappable I/O |
| Pin 32 | PWM7H/RP24 — PWM7 high-side / remappable I/O |
| Pin 33 | PWM7L/RP25 — PWM7 low-side / remappable I/O |
| Pin 34 | RP26/U1RX — Remappable I/O / UART1 RX |
| Pin 35 | RP27/U1TX — Remappable I/O / UART1 TX |
| Pin 36 | PGED1/RP28 — ICSP data / remappable I/O |
| Pin 37 | PGEC1/RP29 — ICSP clock / remappable I/O |
| Pin 38 | PGED2/RP30 — ICSP data (alternate pair) / remappable I/O |
| Pin 39 | PGEC2/RP31 — ICSP clock (alternate pair) / remappable I/O |
| Pin 40 | MCLR — Master clear (reset, active low) |
| Pin 41 | VDD — Digital supply (3.3 V) |
| Pin 42 | VSS — Digital ground |
| Pin 43 | C1IN+ — Comparator 1 positive input |
| Pin 44 | C2IN+ — Comparator 2 positive input |
| Pin 45 | EP — Exposed pad - must be soldered to PCB thermal/ground land |
Typical Applications
DSPIC33EP128GM604-I/ML is suitable for 7 applications: Field-Oriented Control (FOC) of PMSM / BLDC Motors, Digital Switched-Mode Power Supply (SMPS) Control, Photovoltaic Inverter and Solar MPPT Controller, Industrial CAN-Connected Sensor / Actuator Nodes, Sensorless BLDC Fan / Pump Controllers, Automotive 12V Motor and Pump Control, Digital Audio Amplifier and Class-D Control.
Field-Oriented Control (FOC) of PMSM / BLDC Motors
The DSPIC33EP128GM604-I/ML's 70 MIPS throughput executes FOC current loops with margin for cascaded speed/position control, while four on-chip op-amps directly amplify shunt-resistor signals at sub-microsecond settling times. Two QEI modules accept incremental encoder A/B/index signals for rotor position feedback, and the 8/8 PWM channels with 7.5 ns resolution drive the 3-phase inverter at typical 8-20 kHz switching frequencies. Compared with discrete op-amp + MCU designs, integrating analog front-end reduces BOM cost and PCB area for servo drive, drone propulsion, and appliance motor applications.
Recommended
Digital Switched-Mode Power Supply (SMPS) Control
The DSPIC33EP128GM604-I/ML's high-resolution PWM (7.5 ns), 12-bit ADC at 1.1 Msps, and DSP engine are well-suited to digital control loops for buck, boost, and PFC stages. The on-chip op-amps condition voltage and current sense signals while two 12-bit DACs provide reference or analog monitoring outputs. The CAN peripheral enables networked digital-power modules in telecom rectifiers and server PSUs where the DSC's interrupt latency and MAC throughput enable peak-current-mode control above 500 kHz.
Recommended
Photovoltaic Inverter and Solar MPPT Controller
For PV inverter MPPT and grid-tie control loops, the DSPIC33EP128GM604-I/ML's DSP throughput for MPPT algorithms (Perturb&Observe, Incremental Conductance) plus 8/8 PWM channels drive full-bridge inverter topologies. The CAN 2.0B peripheral supports communication with central inverters and SCADA gateways. On-chip comparators enable hardware over-current protection with sub-microsecond response. Designers leverage the 128 KB Flash for grid-synchronization firmware including anti-islanding state machines.
Recommended
Industrial CAN-Connected Sensor / Actuator Nodes
The DSPIC33EP128GM604-I/ML integrates CAN 2.0B plus UART, SPI, and I2C interfaces, making it ideal for industrial automation nodes such as CANopen I/O modules, hydraulic valve controllers, and motor starters. The 128 KB Flash supports CANopen stack libraries, and 16 KB RAM accommodates PDO buffers. The 12-bit ADC with 18 channels reads industrial sensor signals (4-20 mA through external resistors, 0-10 V), and the four comparators provide hardware threshold detection for safety limits.
Recommended
Sensorless BLDC Fan / Pump Controllers
Sensorless BLDC control for fans, pumps, and HVAC blowers benefits from the DSPIC33EP128GM604-I/ML's 12-bit ADC for back-EMF zero-crossing detection and 70 MIPS throughput for BEMF observer algorithms. The integrated op-amps amplify BEMF signals without external analog components, reducing total BOM cost for cost-sensitive consumer appliance markets. The exposed-pad QFN-EP package allows compact fan-inverter PCBs where thermal dissipation is critical at 4-8 W continuous motor power.
Recommended
Automotive 12V Motor and Pump Control
The industrial-grade DSPIC33EP128GM604-I/ML is suitable for non-safety automotive applications such as HVAC flap actuators, water pumps, and oil pumps where its AEC-Q100 sister part (DSPIC33EP128GM604-E/ML or similar) would be required for full automotive qualification. The DSC's 70 MIPS throughput drives FOC for oil and water pumps, the CAN 2.0B peripheral communicates on the vehicle bus, and the integrated op-amps interface to current shunts. Designers should confirm AEC-Q100 grade from Microchip product family documentation before deploying in production automotive builds.
Recommended
Digital Audio Amplifier and Class-D Control
The DSPIC33EP128GM604-I/ML's DSP MAC instructions execute digital audio filters and Class-D amplifier feedback loops in real-time. The 8/8 PWM channels with 7.5 ns resolution drive full-bridge Class-D outputs with 100 kHz+ switching frequencies, while the 12-bit ADC samples output current for speaker-protect state machines. The 128 KB Flash accommodates parametric EQ, limiter, and crossover filter tables for multi-channel audio amplifier applications.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM604-I/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP256GM604-I/ML | DSPIC33EP256GM604T-I/ML | DSPIC33EP128GM604-I/PT |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-pin QFN-EP (8x8 mm) | 44-pin QFN-EP (8x8 mm) - same | 44-pin QFN-EP (8x8 mm) - same | 44-pin TQFP - different footprint |
| Flash Memory | 128 KB | 256 KB | 256 KB | 128 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB |
| CPU Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Operating Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| ADC Resolution / Speed | 12-bit / 1.1 Msps | 12-bit / 1.1 Msps | 12-bit / 1.1 Msps | 12-bit / 1.1 Msps |
| PWM Channels | 8/8 | 8/8 | 8/8 | 8/8 |
| On-Chip Op-Amps | 4 | 4 | 4 | 4 |
| CAN 2.0B | Yes | Yes | Yes | Yes |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| RoHS | Compliant | Compliant | Compliant | Compliant |
Key Differentiators
- On-chip analog front-end (4 op-amps + 4 comparators) eliminates external conditioning components (vs Generic MCU + external op-amp designs (e.g., STM32 with TL082))
- Single-cycle 16x16 MAC with dual 40-bit accumulators for DSP throughput (vs Standard Cortex-M4F (single-cycle MAC at 100 MHz, 32-bit accumulators))
- 128 KB Flash ECC for safety-critical motor control firmware (vs Microchip DSPIC33EP128GP-series (no ECC))
Design Notes
Estimated: at 70 MIPS core load, the dsPIC33EP128GM604-I/ML typically draws around 40-60 mA from VDD. The QFN-EP package's primary thermal path is through the exposed pad to the PCB land. Per Microchip's PCB layout guidelines for QFN packages, place a continuous ground pour on the top layer directly under the EP, with at least four 0.3 mm thermal vias in a 4x4 array connecting to a bottom-side copper pour. Without proper EP soldering, junction temperature can rise 30-40C above ambient at full CPU throughput, reducing reliability in enclosed motor-drive enclosures.
Route analog and digital ground regions separately and join them at a single point near the AVSS/AVDD pins to minimize ADC reference noise. Place 100 nF decoupling capacitors as close as possible to every VDD/VSS pair, with a 4.7 uF bulk capacitor at the AVDD pin. The ICSP programming pins (PGEC1/PGED1 and PGEC2/PGED2) must be routed with no series resistors or capacitors, and any pair can be selected - but both pins of the same pair must be used together per Microchip documentation.
The dsPIC33EP128GM604-I/ML's 12-bit ADC achieves full 1.1 Msps throughput only when the source impedance stays below 500 ohm. Use the on-chip op-amps as front-end buffers when interfacing to higher-impedance sensors (e.g., resistive bridges). For motor current sensing, the on-chip op-amps configured in transimpedance mode provide 10 MHz gain-bandwidth at low gain - sufficient for sub-microsecond current loop response times in 20 kHz FOC applications.
Common pitfalls include: (1) floating MCLR - tie through a 10 kA pull-up to VDD for normal operation; (2) oscillator pins without proper load capacitors - 22 pF is typical for 8 MHz crystals with PLL configured for 60 MHz; (3) ADC channels not configured as digital I/O when used as analog - always set the corresponding TRIS bit to input and the AD1PCFG bit to analog mode; (4) forgetting to enable the PWMCON register bits for center-aligned PWM operation; (6) using PGECx and PGEDx from different pairs - always use matched pairs for ICSP.
Keep PWM traces short and away from analog signal traces to minimize switching noise coupling into the ADC inputs. Use a ground ring around each analog input pin via guard traces tied to AVSS. Place the CAN bus transceiver (e.g., MCP2561) within 50 mm of the dsPIC33EP128GM604's C1TX/C1RX pins and use twisted-pair or controlled-impedance traces for CANH/CANL. The high-current motor traces should not cross over or under the analog section of the PCB.
Compliance Information
RoHS compliant per Microchip product page. Industrial -40C to +85C operating range; not AEC-Q100 qualified. For automotive applications, consult Microchip automotive-grade dsPIC33EP or dsPIC33CK families.