DSPIC33FJ32GP104T-I/PT - 16-Bit 16MIPS DSC 32KB Flash | Microchip
MPN: DSPIC33FJ32GP104T-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.62 | $5.62 |
| 10 | $5.06 | $50.60 |
| 100 | $4.52 | $452.00 |
| 500 | $4.1 | $2,050.00 |
| 1,000 | $3.71 | $3,710.00 |
DSPIC33FJ32GP104T-I/PT Overview
A digital signal controller combines the deterministic interrupt behavior and peripherals of a microcontroller with the multiply-accumulate (MAC) DSP engine of a digital signal processor. In the embedded hierarchy, the dsPIC33FJ sits between general-purpose MCUs and dedicated DSPs, making it a single-chip choice for systems that need both real-time control loops and signal-processing math such as digital filtering or FFT analysis.
Key features of this device include the 16-bit dsPIC33F core executing up to 16 MIPS at 3.3V, 32KB Flash with self-programming capability, 2KB SRAM, and a rich analog and digital peripheral set. Communications options per the verified data include I2C, SPI, UART/USART, IrDA and LINbus, enabling connectivity to sensors, displays and industrial networks. Peripheral Pin Select (PPS) remapping, noted in the family datasheet for the RPn pins, allows digital peripherals to be routed flexibly to I/O pins, which dramatically simplifies PCB layout and board revisions.
Technically, the core pairs a 16-bit MCU pipeline with a DSP engine supporting single-cycle MAC and 40-bit accumulators, while the CMOS process keeps active power low; low-power modes further reduce consumption in battery-operated designs. The internal flexible bus architecture, reported by distributor data, supports efficient peripheral-to-memory transfers.
Typical applications include industrial control and automation nodes, sensor signal conditioning and digital filtering, and embedded communication bridges using UART, SPI or I2C. The 44-TQFP package provides enough I/O for mid-complexity boards without the cost of larger footprints.
Design-wise, connect the metal pad under the device to VSS as recommended in the Microchip datasheet, and budget Flash carefully: 32KB suffices for control-plus-filtering firmware but not for large protocol stacks.
This page synthesizes distributor data, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ32GP104T-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ32GP104T-I/PT (same form factor and footprint) — differing in Core Architecture, Operating Temperature, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ32GP104-I/PT
✅ Drop-In✓ In Stock
$3.98 / Unit
View Datasheet →DSPIC33FJ32GP104T-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ16GP104-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ64GP104-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ32MC104-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ32GP104T-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F modified Harvard RISC |
| Max CPU Speed | 16 MIPS |
| Program Memory Size | 32 KB (11K x 24) Flash |
| RAM Size | 2 KB |
| Package | 44-TQFP (10x10 mm), 0.8 mm pitch |
| Operating Temperature | -40C to +85C (Industrial, I suffix) |
| Mounting Type | Surface Mount |
| Communication Interfaces | I2C, SPI, UART/USART, IrDA, LINbus |
| Peripheral Pin Select (PPS) | Yes (RPn pins remappable per datasheet) |
| DSP Engine | Single-cycle MAC, DSP-class DSC |
| Packaging Suffix | T (Tape and Reel) |
| Qualification (E-variant) | AEC-Q100 (DSPIC33FJ32GP104T-E/PT variant) |
| Process Technology | CMOS |
| Low-Power Modes | Yes (per Microchip USA product data) |
| Debugger Support | MPLAB Snap / MPLAB X IDE (PICkit-class in-circuit debug) |
DSPIC33FJ32GP104T-I/PT Pin Configuration
| Pin 1 | MCLR — Master clear reset / programming voltage input |
| Pin 2 | AN0/VREF+/CN2/RB0 — Analog input 0 / positive voltage reference / change notification / port B |
| Pin 3 | AN1/VREF-/CN3/RB1 — Analog input 1 / negative voltage reference / change notification / port B |
| Pin 4 | AN2/SS1/CN4/RB2 — Analog input 2 / SPI slave select 1 / port B |
| Pin 5 | AN3/INDX/CN5/RB3 — Analog input 3 / QEI index input / port B |
| Pin 6 | AN4/QEA/IC7/CN6/RB4 — Analog input 4 / QEI phase A / input capture 7 / port B |
| Pin 7 | AN5/QEB/IC8/CN7/RB5 — Analog input 5 / QEI phase B / input capture 8 / port B |
| Pin 8 | VSS — Ground reference |
| Pin 9 | OSC1/CLKI — Crystal oscillator input / external clock input |
| Pin 10 | OSC2/CLKO/RC15 — Crystal oscillator output / clock output / port C |
| Pin 11 | VDD — Power supply |
| Pin 12 | VDD — Power supply |
| Pin 13 | PGD/EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 — Programming data / emulation / secondary oscillator input / timer2 clock / UART1 alt TX / port C |
| Pin 14 | PGC/EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 — Programming clock / emulation / secondary oscillator output / timer1 clock / UART1 alt RX / port C |
| Pin 15 | VSS — Ground reference |
| Pin 16 | VDD — Power supply |
| Pin 17 | RF2/SDI1/SDA — Port F / SPI1 data in / I2C data |
| Pin 18 | RF3/SDO1/SCL — Port F / SPI1 data out / I2C clock |
| Pin 19 | RF4/U1RX — Port F / UART1 receive |
| Pin 20 | RF5/U1TX — Port F / UART1 transmit |
| Pin 21 | VSS — Ground reference |
| Pin 22 | RF6/SCK1 — Port F / SPI1 clock |
| Pin 23 | RF7 — General purpose port F I/O |
| Pin 24 | RB6 — General purpose port B I/O |
| Pin 25 | RB7 — General purpose port B I/O |
| Pin 26 | VDD — Power supply |
| Pin 27 | AN8/RB8 — Analog input 8 / port B |
| Pin 28 | AN9/RB9 — Analog input 9 / port B |
| Pin 29 | AN10/RB10 — Analog input 10 / port B |
| Pin 30 | AN11/RB11 — Analog input 11 / port B |
| Pin 31 | AN12/RB12 — Analog input 12 / port B |
| Pin 32 | AN13/RB13 — Analog input 13 / port B |
| Pin 33 | AN14/RB14 — Analog input 14 / port B |
| Pin 34 | AN15/RB15 — Analog input 15 / port B |
| Pin 35 | AVDD — Analog power supply |
| Pin 36 | AVSS — Analog ground |
| Pin 37 | RF12 — General purpose port F I/O |
| Pin 38 | RF13 — General purpose port F I/O |
| Pin 39 | VDD — Power supply |
| Pin 40 | RF0 — General purpose port F I/O |
| Pin 41 | RF1 — General purpose port F I/O |
| Pin 42 | VSS — Ground reference |
| Pin 43 | RC12 — General purpose port C I/O |
| Pin 44 | RC9 — General purpose port C I/O |
Typical Applications
DSPIC33FJ32GP104T-I/PT is suitable for 6 applications: Industrial Control and Automation, Sensor Signal Processing and Digital Filtering, Embedded Communication Bridges and Protocol Converters, Portable and Battery-Powered Instruments, Audio and Voice Signal Processing, Test and Measurement Equipment.
Industrial Control and Automation
In factory automation nodes, the DSPIC33FJ32GP104T-I/PT executes real-time control loops at up to 16 MIPS while its UART and SPI ports link to drives, sensors and HMIs. The 32KB Flash holds control firmware plus protocol handling, and the -40C to +85C industrial rating matches panel-mounted electronics environments. Peripheral Pin Select lets engineers re-route UART and SPI pins in firmware when the board layout changes, cutting respin cost. Deterministic interrupts make scan cycles predictable - a quantified benefit for sequencer and interlock logic where timing jitter directly affects machine safety.
Recommended
Sensor Signal Processing and Digital Filtering
The single-cycle MAC DSP engine of the dsPIC33FJ32GP104 makes it well suited to FIR/IIR filtering of ADC streams from pressure, load-cell and vibration sensors. At 16 MIPS, the core sustains sample rates typical of industrial sensing while the 2KB RAM buffers multiple filter taps and decimation stages. The general purpose (GP) peripheral set pairs converters with UART/SPI links that ship processed values upstream. Because filtering runs on-chip, system cost drops versus a separate MCU plus external DSP, and the 44-TQFP 10x10 mm footprint keeps mixed-signal analog and digital sections close on the PCB.
Recommended
Embedded Communication Bridges and Protocol Converters
With I2C, SPI, UART/USART, IrDA and LINbus interfaces on one chip, the DSPIC33FJ32GP104T-I/PT acts as a protocol converter between field buses and host systems - for example translating LIN diagnostics to UART for service tools, or bridging I2C sensors to a plant RS-232 link. The 16 MIPS core sustains full-rate UART buffering while running protocol state machines, and PPS remapping assigns each interface to optimal board pins. The industrial temperature rating suits outdoor and cabinet installations, and 32KB Flash accommodates multiple protocol stacks with margin for firmware updates.
Recommended
Portable and Battery-Powered Instruments
Handheld measurement tools benefit from the CMOS process and low-power modes of the dsPIC33FJ32GP104, which stretch battery life between charges while still providing 16 MIPS burst performance for waveform capture and math. The single-supply 3.3V operation simplifies power-tree design in portable enclosures, and the 44-TQFP surface-mount package fits compact PCBs. The DSP MAC engine performs windowed FFT and RMS computation on-device, so results display instantly without host assistance. Designers should budget the 2KB RAM carefully for capture buffers, or step to the 64KB Flash family sibling when longer records are needed.
Recommended
Audio and Voice Signal Processing
General purpose dsPIC33F devices are widely used for speech-band processing such as echo cancellation, tone generation and audio filtering. At 16 MIPS with single-cycle MAC, the DSPIC33FJ32GP104 sustains multiple biquad sections and envelope detection at 8-16 kHz voice sample rates, while UART and SPI ports move audio data to codec chips. The 32KB Flash holds codec drivers plus the processing pipeline. This DSC integrates conversion and processing in one 44-TQFP chip, reducing BOM count versus MCU-plus-codec-DSP architectures and shortening signal path length for lower noise pickup on analog lines.
Recommended
Test and Measurement Equipment
Bench instruments, dongle analyzers and data loggers use the dsPIC33FJ32GP104 to time-stamp events, drive front-panel interfaces and preprocess measurement channels at up to 16 MIPS. Its deterministic core supports precise interval timing for frequency and period measurement, while SPI and UART links report results to a display or PC host. The industrial -40C to +85C rating covers unconditioned lab and field environments. Using PPS, designers route capture and compare peripherals to convenient pins, and the MPLAB SNAP debugger supports in-circuit calibration firmware development on the same 44-TQFP production board.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ32GP104T-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ32GP104-I/PT | DSPIC33FJ32GP104T-E/PT | DSPIC33FJ16GP104-I/PT | DSPIC33FJ64GP104-I/PT | DSPIC33FJ32MC104-I/PT |
|---|---|---|---|---|---|---|
| Package | 44-TQFP (10x10 mm) | 44-TQFP (10x10) - same | 44-TQFP (10x10) - same | 44-TQFP (10x10) - same | 44-TQFP (10x10) - same | 44-TQFP (10x10) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Speed | 16 MIPS | 16 MIPS | 16 MIPS | 16 MIPS | 16 MIPS | 16 MIPS |
| Flash Program Memory | 32 KB (11K x 24) | 32 KB | 32 KB | 16 KB (-50%) | 64 KB (+100%) | 32 KB |
| Temperature Range | -40C to +85C (Industrial) | -40C to +85C | Extended / AEC-Q100 | -40C to +85C | -40C to +85C | -40C to +85C |
| Qualification | Industrial (not automotive) | Industrial | AEC-Q100 qualified | Industrial | Industrial | Industrial |
| Peripheral Family Focus | General Purpose (GP) | GP - identical | GP - identical | GP | GP | Motor Control (MC) PWM-focused |
| Packaging | Tape & Reel (T) | Tray / Tube | Tape & Reel (T) | Tray / Tube | Tray / Tube | Tray / Tube |
Key Differentiators
- Identical die available in tray packaging (vs DSPIC33FJ32GP104-I/PT)
- AEC-Q100 upgrade path without redesign (vs DSPIC33FJ32GP104T-E/PT)
- 32KB Flash balances cost and capability (vs DSPIC33FJ16GP104-I/PT)
- Cost-down option exists at same footprint (vs DSPIC33FJ64GP104-I/PT)
Design Notes
Per Microchip datasheet 70000652f, the metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. Include a VSS-tied pad in the 44-TQFP land pattern and thermal relief it to the ground plane. Also reserve the standard 5-pin ICSP header (MCLR, VDD, VSS, PGD pin 13, PGC pin 14) so the MPLAB SNAP programmer can reach the device in-circuit without desoldering.
Provide separate AVDD/AVSS filtering: pin 35 (AVDD) should receive a ferrite bead plus 0.1uF and 10uF decoupling from the digital VDD rail so ADC reference noise stays below converter resolution. Decouple each VDD pin (11, 12, 16, 26, 39) with 0.1uF ceramics placed within 2 mm of the pin. Estimated: 16 MIPS CMOS core activity on a 3.3V rail keeps current in the tens-of-mA class per typical family figures - verify exact ICC in the datasheet electrical specifications section for your supply budget.
Memory budgeting is the most common dsPIC33FJ32GP104 pitfall: 32KB (11K x 24) Flash fills quickly once protocol stacks, DSP filter coefficients and bootloader coexist. If your firmware roadmap exceeds roughly 24KB of code, design in the footprint-compatible 64KB variant now. Second, Peripheral Pin Select applies only to RPn pins - fixed-function analog pins (AN0-AN15) cannot be remapped, so lock analog channel assignments before routing. Finally, note the T suffix only denotes tape-and-reel, not any electrical difference.
Keep the OSC1/OSC2 crystal traces (pins 9-10) short - under 10 mm - with guard ground, and load capacitors per crystal specification. Because PPS allows high-speed SPI clock edges on many candidate pins, route SCK traces away from the AVDD/ANx analog group and consider series 22-33 ohm resistors on SPI clock lines to damp ringing. Segregate analog RB0-RB5 pin usage from fast digital toggling to protect ADC accuracy in mixed-signal sections of the 10x10 mm TQFP.
Compliance Information
The -I/PT device itself is industrial grade, not AEC-Q100 qualified; the E-temperature variant DSPIC33FJ32GP104T-E/PT is AEC-Q100 qualified per Microchip USA. RoHS/REACH status was not stated in the provided web data - confirm on the Microchip product page.
