KSZ9031MNXCC - Gigabit Ethernet PHY Transceiver 64-QFN | Microchip
MPN: KSZ9031MNXCC ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.42 | $5.42 |
| 10 | $4.91 | $49.10 |
| 100 | $4.45 | $445.00 |
| 500 | $3.92 | $1,960.00 |
| 1,000 | $3.51 | $3,510.00 |
KSZ9031MNXCC Overview
A PHY (physical layer device) is the lowest layer of the OSI networking stack and is responsible for encoding/decoding analog line signals onto the cable and presenting a digital MAC interface to the link partner. The KSZ9031 family occupies the gigabit PHY tier of Microchip's networking IC hierarchy: PHY -> Ethernet transceiver -> network interface IC -> wired-connectivity semiconductor. Modern SoCs typically lack an integrated 1G copper PHY, so an external part like the KSZ9031MNXCC is required to connect to standard RJ-45 magnetics.
Key differentiating features include a 1.2V core with integrated LDO regulators, Wake-on-LAN support, HP Auto-MDIX crossover detection, and a programmable LED interface for link/activity/speed indication. The device operates from a single 3.3V supply and consumes approximately 0.7W typical at gigabit full-duplex. Energy-detect power-down and link-disconnect modes drop quiescent power dramatically when the cable is unplugged, suiting always-on but power-conscious embedded designs.
Typical applications include industrial Ethernet gateways, network routers and switches, IP cameras and surveillance NVRs, gaming consoles, set-top boxes, networked printers, and embedded Linux/SoC platforms that expose a GMII or MII bus. The part's AEC-Q100 absence directs designers to industrial-grade end equipment; for automotive Ethernet, Microchip's KSZ9031RNX series is the qualified counterpart. The 8x8 mm QFN-64 footprint is a widely adopted PHY footprint, simplifying PCB layout and enabling second-source flexibility. The 'CC' suffix indicates the commercial temperature grade (0C to +70C), distinguishing it from 'RNX' (industrial -40C to +85C) variants.
When laying out the KSZ9031MNXCC, place the four differential MDI pairs as 100-ohm differential routes with length matching within 50 mils, isolate the analog ground island from the digital ground with a ferrite bead, and route the 25 MHz reference crystal within 5 mm of the XI/XO pins. Use the recommended Bob Smith termination network on unused MDI pairs to suppress common-mode noise. Reference the manufacturer datasheet GMII/MII timing diagrams for high-speed MAC interface traces.
Drop-in alternatives for KSZ9031MNXCC — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with KSZ9031MNXCC (same form factor and footprint) — differing in Package, Product Type, Data Rate, Cable Type, LED Outputs.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
KSZ9031MNXCA
✅ Drop-In📋 Reference alternative (not in catalog)
KSZ9031RNXUB
✅ Drop-In📋 Reference alternative (not in catalog)
KSZ9031RNXVB
✅ Drop-In📋 Reference alternative (not in catalog)
KSZ9031RNXUB-VAO
✅ Drop-In✓ In Stock
$6.1 / Unit
View Datasheet →KSZ9031RNXVB-TRVAO
✅ Drop-In✓ In Stock
$5.1 / Unit
View Datasheet →KSZ9031MNXCC Specifications
| Product Type | Ethernet PHY Transceiver |
| Data Rate | 10/100/1000 Mbps |
| Network Standard | IEEE 802.3 (10Base-T/100Base-TX/1000Base-T) |
| MAC Interface | GMII / MII |
| I/O Voltage Tolerance | 3.3V / 2.5V / 1.8V |
| Supply Voltage | 3.3V (single supply) |
| Power Consumption (Typical) | ~0.7W at 1000 Mbps full-duplex |
| Auto-Negotiation | Yes (10/100/1000 Mbps) |
| Auto-MDIX | Yes (HP Auto-MDIX) |
| Wake-on-LAN | Yes |
| LED Interface | Programmable multi-LED |
| Operating Temperature | 0C to +70C (commercial grade, CC suffix) |
| Package | 64-pin QFN (8x8 mm), lead-free |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
KSZ9031MNXCC Pin Configuration
| Pin 1 | VDDIO — I/O supply voltage (1.8V/2.5V/3.3V) |
| Pin 2 | TXD0 — GMII/MII transmit data bit 0 |
| Pin 3 | TXD1 — GMII/MII transmit data bit 1 |
| Pin 4 | TXD2 — GMII/MII transmit data bit 2 |
| Pin 5 | TXD3 — GMII/MII transmit data bit 3 |
| Pin 6 | TX_ER — GMII/MII transmit coding error |
| Pin 7 | TX_EN — GMII/MII transmit enable |
| Pin 8 | TX_CLK — GMII/MII transmit clock |
| Pin 9 | COL — GMII/MII collision detect |
| Pin 10 | CRS — GMII/MII carrier sense |
| Pin 11 | RX_CLK — GMII/MII receive clock |
| Pin 12 | RXD0 — GMII/MII receive data bit 0 |
| Pin 13 | RXD1 — GMII/MII receive data bit 1 |
| Pin 14 | RXD2 — GMII/MII receive data bit 2 |
| Pin 15 | RXD3 — GMII/MII receive data bit 3 |
| Pin 16 | RX_ER — GMII/MII receive error |
| Pin 17 | RX_DV — GMII/MII receive data valid |
| Pin 18 | MDC — Management data clock |
| Pin 19 | MDIO — Management data I/O |
| Pin 20 | INTn — Interrupt output (active low) |
| Pin 21 | RESETn — Hardware reset (active low) |
| Pin 22 | LED1/PME_N1 — Programmable LED 1 / Wake-on-LAN |
| Pin 23 | LED2 — Programmable LED 2 |
| Pin 24 | LED3 — Programmable LED 3 |
| Pin 25 | VDDIO — I/O supply voltage |
| Pin 26 | XI — 25 MHz crystal input |
| Pin 27 | XO — 25 MHz crystal output |
| Pin 28 | VDDA — Analog 3.3V supply |
| Pin 29 | VSS — Ground |
| Pin 30 | VDD — Core 1.2V (LDO output) |
| Pin 31 | VSS — Ground |
| Pin 32 | VDDA — Analog 3.3V supply |
| Pin 33 | MDIP_A — MDI pair A positive |
| Pin 34 | MDIN_A — MDI pair A negative |
| Pin 35 | VSS — Ground |
| Pin 36 | VDDA — Analog 3.3V supply |
| Pin 37 | MDIP_B — MDI pair B positive |
| Pin 38 | MDIN_B — MDI pair B negative |
| Pin 39 | VSS — Ground |
| Pin 40 | VDDA — Analog 3.3V supply |
| Pin 41 | MDIP_C — MDI pair C positive |
| Pin 42 | MDIN_C — MDI pair C negative |
| Pin 43 | VSS — Ground |
| Pin 44 | VDDA — Analog 3.3V supply |
| Pin 45 | MDIP_D — MDI pair D positive |
| Pin 46 | MDIN_D — MDI pair D negative |
| Pin 47 | VSS — Ground |
| Pin 48 | TEST1 — Test pin 1 (factory use) |
| Pin 49 | TEST2 — Test pin 2 (factory use) |
| Pin 50 | NC — Not connected (per datasheet) |
| Pin 51 | CFG0 — Configuration strap 0 |
| Pin 52 | CFG1 — Configuration strap 1 |
| Pin 53 | CFG2 — Configuration strap 2 |
| Pin 54 | CFG3 — Configuration strap 3 |
| Pin 55 | VDDIO — I/O supply voltage |
| Pin 56 | VSS — Ground |
| Pin 57 | NC — Not connected (per datasheet) |
| Pin 58 | NC — Not connected (per datasheet) |
| Pin 59 | NC — Not connected (per datasheet) |
| Pin 60 | NC — Not connected (per datasheet) |
| Pin 61 | NC — Not connected (per datasheet) |
| Pin 62 | NC — Not connected (per datasheet) |
| Pin 63 | NC — Not connected (per datasheet) |
| Pin 64 | EP — Exposed thermal pad (connect to ground) |
Typical Applications
KSZ9031MNXCC is suitable for 6 applications: Industrial Ethernet Gateways and Routers, IP Cameras and Network Video Recorders, FPGA-Based SoM and Development Boards, Networked Printers and Multifunction Devices, Set-Top Boxes and Consumer Streaming Devices, Industrial IoT Edge Gateways.
Industrial Ethernet Gateways and Routers
The KSZ9031MNXCC's 1000BASE-T performance and GMII/MII interface suit industrial protocol gateways where deterministic gigabit uplink is needed. Placed between an SoC's MAC and the RJ-45 magnetics, it provides hardware auto-negotiation, HP Auto-MDIX eliminating crossover cables, and robust baseline-wander correction over Cat-5e runs up to 100m. Compared to Fast Ethernet PHYs, the gigabit throughput eliminates uplink bottlenecks when bridging multiple fieldbuses (EtherCAT, PROFINET) and is compatible with -40C to +85C industrial environments via the same-footprint KSZ9031MNXCA upgrade path.
Recommended
IP Cameras and Network Video Recorders
The KSZ9031MNXCC delivers the gigabit uplink bandwidth that modern 4K IP cameras and NVRs demand for raw H.265 streams. Integrated HP Auto-MDIX removes the need for crossover cables during installation, and the programmable LED interface drives link/activity/speed indicators on the camera housing. The 64-QFN 8x8 mm footprint is small enough for PoE-powered camera PCBs, and the part's Wake-on-LAN support enables remote camera wake-up from sleep states, reducing idle power in surveillance deployments.
Recommended
FPGA-Based SoM and Development Boards
FPGA SoMs and dev boards (Xilinx Kintex, Intel Cyclone, Microchip PolarFire) frequently integrate the KSZ9031MNXCC as the on-board gigabit copper PHY. Its GMII/MII interface maps to FPGA LVCMOS I/O banks at 1.8V/2.5V/3.3V, the integrated termination simplifies the analog front-end, and the 64-QFN package is small enough to fit beneath an RJ-45 jack shield. Linux and bare-metal drivers for the KSZ9031 are widely available from Microchip and the FPGA vendor ecosystem, shortening firmware bring-up time.
Recommended
Networked Printers and Multifunction Devices
The KSZ9031MNXCC's gigabit throughput and hardware auto-negotiation accelerate large print jobs and scans over office LANs. Its energy-detect power-down mode lowers idle consumption when the printer is in sleep, and Wake-on-LAN brings the device back online at the touch of a print server push. The 64-QFN 8x8 mm footprint fits inside the cramped printer mainboard, and the proven Microchip PHY driver stack integrates cleanly with embedded Linux print-server stacks (CUPS, IPP).
Recommended
Set-Top Boxes and Consumer Streaming Devices
Set-top boxes and 4K media streamers benefit from the KSZ9031MNXCC's gigabit copper link to home routers, enabling reliable 4K HDR streaming, IPTV multicast, and gaming traffic without buffering. The single 3.3V supply and integrated LDO regulators simplify the BOM, the HP Auto-MDIX feature means consumers never need to think about crossover cables, and the small 64-QFN package leaves board real-estate for HDMI, Wi-Fi, and tuner subsystems. Wake-on-LAN supports instant-on from network standby.
Recommended
Industrial IoT Edge Gateways
Industrial IoT edge gateways aggregating sensor and machine data to the cloud benefit from the KSZ9031MNXCC's gigabit uplink to the WAN side and its deterministic auto-negotiation to industrial switches. The part's Wake-on-LAN function wakes the gateway on incoming management traffic from the cloud, lowering idle power in field deployments with intermittent connectivity. The 64-QFN footprint and proven driver support let gateway designers reuse the same PHY across multiple SKUs, and the same-footprint KSZ9031MNXCA variant enables field upgrades to industrial temperature without PCB changes.
Recommended
Recommended Products Summary
Engineering reference data for KSZ9031MNXCC — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | KSZ9031MNXCA | KSZ9031RNXUB | KSZ9031RNXVB | KSZ9031RNXUB-VAO | KSZ9031RNXVB-TRVAO |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-QFN (8x8 mm) | 64-QFN (8x8 mm) - same | 64-QFN (8x8 mm) - same | 64-QFN (8x8 mm) - same | 64-QFN (8x8 mm) - same | 64-QFN (8x8 mm) - same |
| Data Rate | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) | -40C to +85C (industrial) | -40C to +85C (industrial) | -40C to +85C (automotive) | -40C to +85C (automotive) |
| IEEE 1588 PTP Support | No | No | Yes | Yes | Yes | Yes |
| Automotive Grade | No | No | No | No | Yes (VAO) | Yes (TRVAO) |
| MAC Interface | GMII / MII | GMII / MII | GMII / MII | GMII / MII | GMII / MII | GMII / MII |
Key Differentiators
- Single same-footprint upgrade path to industrial and automotive temperature grades (vs KSZ9031MNXCA / KSZ9031RNXUB-VAO)
- HP Auto-MDIX with full 1000BASE-T gigabit support (vs KSZ8061 (10/100 only))
- Optional 1588 PTP timestamp support in same package (vs KSZ9031MNXCC (no PTP))
Design Notes
Route the four MDI differential pairs (MDIP_A/MDIN_A through MDIP_D/MDIN_D) as 100-ohm differential traces with length matching within 50 mils, keeping each pair tightly coupled (trace spacing less than 2x trace width). Isolate the analog ground island under the PHY with a ferrite bead from the digital ground to suppress return-current noise from the GMII bus. Place the 25 MHz crystal within 5 mm of the XI/XO pins and shield its traces with a ground guard ring.
Estimated: At full gigabit full-duplex traffic with 3.3V supply and ~0.7W typical dissipation, the 64-QFN package's thermal resistance is dominated by the PCB footprint. Solder the exposed pad (pin EP) to a continuous ground plane on both top and bottom layers with at least 16 thermal vias (0.3 mm drill) to keep junction temperature rise below 30C in still-air at 25C ambient. For sealed enclosures with no airflow, derate to 100BASE-TX if junction temperature trends above 95C.
Do not leave the MDIO/MDC pull-ups off the management bus - the KSZ9031MNXCC will not respond to PHY reads/writes without external 1.5k pull-ups to VDDIO. Do not forget the Bob Smith termination (75 ohm resistor + 4.7 nF cap to ground) on each unused MDI center tap when only 100BASE-TX is used; without it, EMI fails on the unused pairs. Finally, never operate without a 1.0 uF ceramic decoupling capacitor within 3 mm of each VDDA pin.
GMII runs at 125 MHz with edges of approximately 1 ns; route these traces as 50-ohm controlled-impedance microstrips with reference to a solid ground plane, keep adjacent traces separated by at least 3x trace width, and avoid crossing the analog ground split. Use source-series termination (22-33 ohm) on TX_CLK, RX_CLK, and TX_EN at the PHY end if long MAC-side traces exceed 50 mm.
Compliance Information
Lead-free QFN package per Microchip product ordering information. RoHS and REACH compliant per distributor listings. Standard KSZ9031MNXCC is NOT AEC-Q100 qualified - for automotive applications, select KSZ9031RNXUB-VAO or KSZ9031RNXVB-TRVAO automotive-grade variants.
