MC68711E20CFNE2 - 8-Bit 2MHz 20KB OTP HC11 MCU | NXP | 52-PLCC
MPN: MC68711E20CFNE2 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $28.5 | $28.50 |
| 10 | $24.75 | $247.50 |
| 100 | $19.4 | $1,940.00 |
| 500 | $15.95 | $7,975.00 |
| 1,000 | $13.2 | $13,200.00 |
MC68711E20CFNE2 Overview
What is a microcontroller (MCU)? A microcontroller is a single-chip computer that integrates a CPU, memory (program + data), and peripheral interfaces on one piece of silicon. The HC11 (High-performance Complementary Metal-Oxide Semiconductor 68HC11) family belongs to the CISC (Complex Instruction Set Computer) microcontroller hierarchy: MCU -> 8-bit MCU -> HC11 family -> M68HC11 E-series -> industrial/automotive embedded controllers. CISC MCUs offer rich instruction sets, multiple addressing modes, and bit-manipulation features favored in legacy automotive, industrial-control, and instrumentation designs.
Key features include an M68HC11 CPU core with 16-bit internal addressing, an 8-channel 8-bit ADC, asynchronous serial communications interface (SCI), serial peripheral interface (SPI), 16-bit timer/counter, pulse accumulator, real-time interrupt, computer-operating-properly (COP) watchdog, and up to 38 general-purpose I/O lines. The OTP EPROM allows one-time factory or field programming using an EPROM programmer socket, while the 768-byte on-chip RAM supports variable data storage for stack, registers, and scratchpad operations.
The MC68711E20CFNE2 uses a fully static CMOS design allowing clock frequencies down to DC, with low-voltage (3 V) variants available within the E-series family. The 52-pin PLCC package supports both surface-mount assembly and programming-socket insertion for development and prototyping. Operating temperature spans the industrial range of -40 °C to +85 °C, making it suitable for automotive under-hood, factory automation, and harsh-environment embedded applications.
Typical applications include automotive engine control units (ECUs), antilock braking systems (ABS), industrial process controllers, instrumentation, security-system controllers, and legacy embedded-control replacements where pin-compatible HC11 footprint compatibility is required. Designers choose the MC68711E20CFNE2 when a mature, well-documented 8-bit core with on-chip EPROM and rich peripherals is preferable to migrating code to a newer architecture.
When designing with this device, ensure the OTP programming algorithm matches the manufacturer's specification - incorrect Vpp ramp timing or address sequence can permanently damage the part. Allow at least 100 ms power-on-reset settling time, and use the COP watchdog to detect firmware lockup conditions in safety-critical applications.
This page synthesizes distributor inventory, cross-reference alternatives (MC68711E20CFNE3/E4), and design considerations not consolidated on any single manufacturer or distributor page.
Drop-in alternatives for MC68711E20CFNE2 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68711E20CFNE2 (same form factor and footprint) — differing in Core Architecture, Serial Interfaces, Timers, ADC, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC68711E20CFNE3
✅ Drop-In✓ In Stock
$22.75 / Unit
View Datasheet →MC68711E20CFNE4
✅ Drop-In📋 Reference alternative (not in catalog)
MC68HC11E20CFNE2
✅ Drop-In📋 Reference alternative (not in catalog)
MC68HC11E1CFNE3
✅ Drop-In📋 Reference alternative (not in catalog)
MC68HC711E20CFNE2
✅ Drop-In📋 Reference alternative (not in catalog)
MC68711E20CFNE2 Maximum Ratings & Electrical Characteristics
| Core Architecture | M68HC11 (CISC, 8-bit) |
| Data Bus Width | 8 bit |
| Maximum Clock Frequency | 2 MHz |
| Program Memory Size | 20 KB (20K x 8) OTP EPROM |
| RAM Size | 768 bytes |
| EEPROM Size | EPP (EPROM-based; 512 bytes per E-series data sheet) |
| ADC | 8-channel, 8-bit |
| Timers | 16-bit timer + pulse accumulator + RTI |
| Serial Interfaces | 1x SCI (async UART), 1x SPI |
| I/O Pins | Up to 38 GPIO |
| Watchdog | COP (Computer Operating Properly) |
| Operating Voltage | 5 V (3 V low-voltage variants available in E-series) |
| Operating Temperature | -40 °C to +85 °C (industrial) |
| Package | 52-PLCC (19.1 x 19.1 mm) |
| Mounting Type | Surface Mount (PLCC socket optional) |
| RoHS Status | Non-compliant (original EOL part - pre-RoHS era) |
MC68711E20CFNE2 52-plcc (19.1 x 19.1 mm) Pin Configuration Guide
Pin configuration for MC68711E20CFNE2 (52-plcc (19.1 x 19.1 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for MC68711E20CFNE2.
Refer to the datasheet for full pin configuration.
Typical Applications
MC68711E20CFNE2 is suitable for 6 applications: Automotive Engine Control Units (ECUs), Antilock Braking System (ABS) Controllers, Industrial Process Controllers, Security and Access Control Panels, Test and Measurement Instrumentation, Legacy Embedded Control Replacements.
Automotive Engine Control Units (ECUs)
The MC68711E20CFNE2 fits automotive engine control units because of its 20 KB OTP EPROM, which is large enough for closed-loop fuel-injection and ignition control firmware while remaining one-time-programmable for production cost efficiency. The HC11's 8-channel 8-bit ADC is sufficient for MAP, MAF, and O2 sensor sampling at typical engine control sampling rates. The 16-bit timer/counter with pulse accumulator accurately measures crank and cam tooth timing signals at thousands of RPM. The COP watchdog and -40 °C to +85 °C industrial temperature range satisfy under-hood automotive thermal and reliability requirements, and the mature HC11 toolchain (assembler, simulator, BDM) accelerates ECU firmware development.
Recommended
Antilock Braking System (ABS) Controllers
The MC68711E20CFNE2 is well matched to ABS wheel-speed monitoring and brake-actuator control because its 16-bit timer/counter can precisely measure four wheel-speed sensor frequencies up to several kHz. The 8-bit ADC reads hydraulic pressure transducers and brake-pedal position sensors with adequate resolution for ABS loop control. The 768-byte RAM supports the real-time wheel-slip calculation state machine, while the 20 KB EPROM holds the ABS control algorithm and diagnostic routines. The HC11's deterministic instruction timing and COP watchdog meet automotive functional-safety expectations, and the legacy ABS reference designs from the 1990s reuse this exact 52-PLCC MCU.
Recommended
Industrial Process Controllers
The MC68711E20CFNE2 fits industrial process controllers because the 8-channel ADC reads multiple 4-20 mA or 0-10 V analog sensor inputs through external signal conditioning, and the SCI (UART) supports RS-485 or RS-232 communication to a host PLC or HMI. The 20 KB EPROM accommodates PID control loops, alarm handlers, and Modbus RTU firmware. The COP watchdog resets the controller on firmware lockup, while the industrial temperature range supports operation inside sealed control cabinets. The fully static HC11 core allows clock-throttling during low-activity periods to reduce power dissipation in 24-V loop-powered installations.
Recommended
Security and Access Control Panels
The MC68711E20CFNE2 is appropriate for security alarm panels and access-control readers because its GPIO pins drive keypads, LED indicators, sirens, and relay outputs directly without external glue logic. The SPI interface supports secure key-card or biometric reader modules, while the SCI UART allows reporting to a central monitoring station over a phone line or modem. The 768-byte RAM stores recent event log entries, and the 20 KB EPROM holds the alarm-state machine plus zone-configuration logic. The OTP variant prevents firmware reverse engineering in security-sensitive deployments, a key advantage over UV-erasable parts.
Recommended
Test and Measurement Instrumentation
The MC68711E20CFNE2 fits entry-level test and measurement instruments (digital multimeters, counters, signal generators) because the 8-bit ADC samples voltage/current/resistance measurements at typical DMM update rates of 2-4 conversions per second, and the HC11 core performs range-selection and display-driving logic. The SPI bus interfaces with LCD driver chips, while the 16-bit timer/counter measures frequency and period with high accuracy when paired with a precision timebase. The 20 KB EPROM holds calibration tables and user-interface menus, and the OTP programming prevents tampering with calibration data after manufacturing.
Recommended
Legacy Embedded Control Replacements
The MC68711E20CFNE2 is the canonical drop-in for legacy 68HC11 designs where the original MCU has failed and a PCB redesign is unacceptable. The 52-PLCC form factor, identical pinout, and HC11 instruction set allow the firmware binary (or recompiled source) to run unchanged on the replacement part. This significantly extends the service life of industrial machinery, scientific instruments, and aerospace ground-support equipment originally designed in the 1990s. EOL distributors like DigiKey, Mouser, and independent brokers maintain trace inventory specifically for these long-tail maintenance scenarios.
Recommended
Recommended Products Summary
Engineering reference data for MC68711E20CFNE2 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68711E20CFNE3 | MC68711E20CFNE4 | MC68HC11E20CFNE2 | MC68HC11E1CFNE3 | MC68HC711E20CFNE2 |
|---|---|---|---|---|---|---|
| Package | 52-PLCC | 52-PLCC - same | 52-PLCC - same | 52-PLCC - same | 52-PLCC - same | 52-PLCC - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Program Memory | 20 KB OTP EPROM | 20 KB EPROM (UV-erasable) | 20 KB EPROM (RoHS finish) | 20 KB EPROM (mask revision) | 1 KB EPROM | 20 KB EPROM (HC711 timing) |
| RAM | 768 bytes | 768 bytes | 768 bytes | 768 bytes | 768 bytes | 768 bytes |
| CPU Clock Max | 2 MHz | 2 MHz | 2 MHz | 2 MHz | 2 MHz | 2 MHz |
| Memory Type | OTP (one-time programmable) | UV-erasable EPROM (window) | OTP (lead-free) | Mask ROM equivalent | UV-erasable EPROM | EPROM (different Vpp timing) |
| RoHS Compliance | Non-compliant (pre-RoHS) | Non-compliant | Compliant (lead-free) | Non-compliant | Non-compliant | Non-compliant |
| Lifecycle Status | EOL | EOL | EOL | EOL | EOL | EOL |
Key Differentiators
- 20 KB OTP EPROM in 52-PLCC for low-cost production (vs MC68711E20CFNE3)
- Pre-RoHS finish - usable in legacy non-RoHS designs (vs MC68711E20CFNE4)
- Largest on-chip EPROM in the 68HC11 E-series 52-PLCC family (vs MC68HC11E1CFNE3)
Design Notes
The MC68711E20CFNE2 requires a stable 5 V ±10% supply with bulk decoupling (10 µF electrolytic + 0.1 µF ceramic) within 25 mm of the VDD and VSS pins. The HC11 core draws up to 25 mA active at 2 MHz; in STOP mode current drops below 10 µA, making the part suitable for battery-backed applications. A power-on-reset delay of at least 100 ms is required after VDD reaches 4.75 V before code execution begins.
The 52-PLCC footprint should be laid out with the J-lead pads on a 1.27 mm pitch grid following the JEDEC PLCC-52 standard. Include a PLCC test socket footprint for prototype programming/debugging since OTP EPROM cannot be re-programmed in-circuit. Route the E (enable) and RESET pins with short traces to minimize EMI coupling, and place the external crystal within 10 mm of the XTAL/EXTAL pins with a guarded ground ring to reduce clock jitter.
OTP EPROM programming requires a precise Vpp ramp to 12.0 V ±50 mV with address-stable setup of at least 1 µs; violations permanently damage the part. Never attempt to program the MC68711E20CFNE2 with an algorithm written for the HC711E series (different Vpp timing). When migrating between CFNE2 and CFNE3, the firmware binary is fully compatible, but verify that the E-series interrupt vector table matches the configured CONFIG register for ROM/EPROM mapping at $0000 or $E000.
Estimated: at 2 MHz CPU clock, HC11 address and data buses have ~20 ns rise/fall times; route them over a continuous ground plane and keep traces under 50 mm to avoid reflections. Place a 33 pF capacitor on the IRQ pin to filter high-frequency noise spikes that could cause spurious interrupts in noisy industrial environments. Decouple each VDD/VSS pair locally with 0.1 µF X7R ceramic within 5 mm of the pin pair.
Compliance Information
MC68711E20CFNE2 is a pre-RoHS EOL part; the suffix 'E2' indicates OTP EPROM technology, not RoHS status. CFNE4 suffix is the RoHS-compliant variant.
