MPC870VR66-FR - 66MHz PowerQUICC MPC8xx 32-bit CPU | Freescale/NXP
MPN: MPC870VR66-FR ✗ End of LifeMPC870VR66-FR Overview
A PowerQUICC processor is a system-on-chip communications controller that integrates a Power Architecture CPU with flexible peripheral interfaces such as serial, Fast Ethernet, ATM, and time-division multiplexed channels. Historically, the MPC8xx family was the first PowerQUICC generation, designed to consolidate the CPU, memory controller, and communication peripherals into a single IC, reducing BOM cost and board area in routers, DSLAM line cards, and industrial control platforms. The MPC87x series specifically targets low-cost, low-power communications designs that need Power Architecture performance without the higher clock speeds of the MPC860/MPC866 family.
Key features of the MPC870VR66-FR include the 32-bit Power Architecture core running at 66 MHz, an integrated memory controller supporting DRAM, SRAM, ROM, and Flash, a communications processor module (CPM) that offloads serial and networking tasks from the CPU, and a flexible bus architecture with 16 KB of internal cache. The 256-PBGA package supports the wide address and data buses plus the CPM peripheral pins while remaining surface-mountable on standard 1.27 mm-pitch PCB land patterns.
Typical applications include integrated access devices (IADs), residential gateways, SOHO routers, industrial serial-to-Ethernet bridges, and legacy telecom line cards where Power Architecture code compatibility is required. The part is also used in renewable energy inverter controllers, building automation, and factory-floor protocol converters that benefit from its deterministic interrupt response and on-chip peripherals.
When designing with this device, pay close attention to the dual-voltage power tree (3.3 V I/O and 1.8 V core), provide proper decoupling on every supply pin pair, and ensure PCB layout follows BGA escape routing best practices with matched impedance on the address and data bus groups. The internal CPM can be used to run HDLC, UART, or Fast Ethernet MAC protocols, freeing the core for higher-layer processing.
Drop-in alternatives for MPC870VR66-FR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MPC870VR66-FR (same form factor and footprint) — differing in Core Architecture, Manufacturer, Operating Temperature, Mounting Type, Core Frequency.
MPC870VR66
✅ Drop-InContact for price
View Datasheet →MPC875VR133
✅ Drop-InContact for price
View Datasheet →MPC875ZT133
✅ Drop-InContact for price
View Datasheet →MPC870VR66-FR Maximum Ratings & Electrical Characteristics
| Manufacturer | Freescale Semiconductor (now NXP Semiconductors) |
| Series | PowerQUICC I, MPC8xx |
| Core Architecture | Power Architecture, 32-bit |
| Core Count | 1 |
| Core Frequency | 66 MHz |
| I/O Supply Voltage | 3.3 V |
| Core Supply Voltage | 1.7 V to 1.9 V |
| Internal Cache | 16 KB |
| Package | 256-PBGA (23x23 mm) |
| Mounting Type | Surface Mount |
| Operating Temperature | 0 C to +95 C |
| Packaging Option | Tape and Reel ('-FR' suffix) |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Communications Processor Module (CPM) | Integrated, multi-channel serial controller |
MPC870VR66-FR 256-pbga (23x23 mm) Pin Configuration Guide
Pin configuration for MPC870VR66-FR (256-pbga (23x23 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for MPC870VR66-FR.
Refer to the datasheet for full pin configuration.
Typical Applications
MPC870VR66-FR is suitable for 7 applications: SOHO Router / Residential Gateway, Industrial Serial-to-Ethernet Bridge, DSLAM Line Card Controller, Building Automation / HVAC Controller, Legacy Telecom Line Card, Renewable Energy Inverter Control, Point-of-Sale / Embedded Terminal.
SOHO Router / Residential Gateway
The MPC870VR66-FR's integrated Power Architecture core and on-chip communications processor module (CPM) make it a strong fit for SOHO routers and residential gateways that need a single-chip CPU plus serial/Ethernet MAC functions. At 66 MHz the core comfortably runs a small RTOS, NAT table, and DHCP/TFTP services while the CPM handles PPPoE, HDLC, or Ethernet framing in hardware. The 256-PBGA package keeps board area small, and the 3.3 V/1.8 V dual-rail design lets designers reuse common power trees from other MPC8xx designs. Compared with discrete CPU+MAC solutions, the part reduces BOM cost and PCB area at the expense of forward scalability, which is acceptable for fixed-function consumer gateway products.
Recommended
Industrial Serial-to-Ethernet Bridge
In factory-floor protocol converters, the MPC870VR66-FR's deterministic interrupt response and multi-protocol CPM allow engineers to bridge legacy RS-232/RS-485 field buses to Ethernet with predictable latency. The 66 MHz core handles Modbus TCP, EtherNet/IP, or PROFINET application stacks while the CPM offloads the UART DMA, freeing CPU cycles for protocol translation. The 0 C to 95 C operating temperature range covers most indoor industrial cabinets, and the 256-PBGA package provides the I/O density needed for multiple UART channels plus an MII Ethernet MAC. Compared with newer Cortex-M based bridges, the MPC870VR66-FR delivers more deterministic real-time behavior at the cost of higher power consumption.
Recommended
DSLAM Line Card Controller
The MPC870VR66-FR has historically been used in DSLAM line cards to terminate ATM or HDLC traffic from the DSL PHY and forward it to an upstream network processor. Its integrated CPM supports multi-channel HDLC and ATM SAR functions, while the 66 MHz Power Architecture core handles control-plane processing and OAM messaging. The wide 32-bit external bus accommodates the line card's high-throughput DMA, and the 256-PBGA provides the pin count required for multiple serial channels plus ATM cell interfaces. Compared with ASIC-only DSLAM solutions, the programmable PowerQUICC platform enables field upgrades via firmware without respinning hardware.
Recommended
Building Automation / HVAC Controller
Building automation and HVAC controllers benefit from the MPC870VR66-FR's deterministic interrupt response, on-chip peripherals, and Power Architecture code compatibility with legacy facility-management firmware. The CPM can drive multiple UARTs for BACnet MS/TP or Modbus RTU field buses, while the CPU core runs the application logic. The 0 C to 95 C operating temperature range covers most mechanical rooms, and the 256-PBGA footprint is well established in long-life industrial designs. Compared with newer ARM Cortex-R5 controllers, the MPC870VR66-FR offers a stable, mature software ecosystem at the cost of higher power consumption.
Recommended
Legacy Telecom Line Card
The MPC870VR66-FR is well suited to legacy T1/E1 line cards where it terminates multi-channel HDLC frames and bridges them to a backplane TDM bus. Its integrated time-slot assigner and bit-clock recovery in the CPM eliminate external framers, and the 66 MHz Power Architecture core handles signaling stacks. The 256-PBGA package provides the pin count needed for both serial channels and a high-speed bus interface. Compared with newer framer ICs, the integrated PowerQUICC platform reduces part count but consumes more board power per channel.
Recommended
Renewable Energy Inverter Control
Solar and small-wind inverter controllers use the MPC870VR66-FR to manage PWM generation, grid-synchronization sampling, and Modbus/RTU reporting in a single chip. The deterministic Power Architecture core, integrated timers, and CPM-driven serial channels let one part replace a CPU plus external framer. The 0 C to 95 C rating covers most inverter enclosures with proper thermal design, and the 256-PBGA package supports the wide bus required for high-resolution ADC interfaces. Compared with dedicated DSP controllers, the MPC870VR66-FR offers stronger general-purpose processing but lower raw DSP throughput for FFT-heavy grid analytics.
Recommended
Point-of-Sale / Embedded Terminal
Embedded POS terminals and kiosks have used the MPC870VR66-FR as a single-chip controller running the application OS plus peripheral I/O for printers, scanners, and Ethernet. The CPM's DMA-driven UARTs accelerate scanner/print transactions, while the 66 MHz Power Architecture core runs the GUI stack and payment application logic. The 256-PBGA package and surface-mount reflow profile suit volume manufacturing. Compared with newer ARM Cortex-A application processors, the MPC870VR66-FR delivers a mature, deterministic platform but lacks the graphics performance needed for modern touchscreen UIs.
Recommended
Recommended Products Summary
Engineering reference data for MPC870VR66-FR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MPC870VR66 | MPC875VR133 | MPC875ZT133 |
|---|---|---|---|---|
| Package | 256-PBGA (23x23) | 256-PBGA (23x23) - same | 256-PBGA (23x23) - same | 256-PBGA (23x23) - same |
| Brand | Freescale / NXP | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Core Architecture | Power Architecture, 32-bit | Power Architecture, 32-bit | Power Architecture, 32-bit | Power Architecture, 32-bit |
| Core Frequency | 66 MHz | 66 MHz | 133 MHz (+102%) | 133 MHz (+102%) |
| Core Supply Voltage | 1.7 V to 1.9 V | 1.7 V to 1.9 V | 1.7 V to 1.9 V | 1.7 V to 1.9 V |
| I/O Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Operating Temperature | 0 C to +95 C | 0 C to +95 C | 0 C to +95 C | -40 C to +105 C (extended) |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete |
| RoHS / Lead Free | RoHS Compliant / Lead Free | RoHS Compliant / Lead Free | RoHS Compliant / Lead Free | RoHS Compliant / Lead Free |
Key Differentiators
- Tape-and-reel packaging option ready for high-volume SMT (vs MPC870VR66)
- PowerQUICC I communications processor module integrated on-die (vs MPC875VR133)
- Wide third-party firmware and tool-chain ecosystem (vs MPC875ZT133)
Design Notes
The MPC870VR66-FR requires two independent supply rails: a 3.3 V I/O rail and a 1.7 V to 1.9 V core rail. Per the MPC87x datasheet, the core rail must be brought up before the I/O rail to prevent internal latch-up, and a sequenced power-supply IC or simple RC delay plus MOSFET circuit can enforce this ordering. Place at least one 10 uF bulk ceramic plus a 0.1 uF high-frequency bypass capacitor within 5 mm of every BGA power-pin pair to keep switching transients within the datasheet's AC tolerance.
The 256-PBGA package uses 1.27 mm ball pitch on a 23x23 mm body, requiring 4-layer PCB stack-up with matched-impedance escape traces on the address and data bus groups. Route the wide external data bus (D[0:31]) on inner layers with continuous reference planes to control crosstalk, and stitch the BGA perimeter with a GND via fence to reduce simultaneous-switching noise (SSN). Always follow NXP's recommended reflow profile (peak 260 C, 60-90 s above 217 C) to avoid BGA ball co-planarity failures.
Estimated power dissipation at 66 MHz core and full bus activity is approximately 1.2 W, which the 256-PBGA can handle only with adequate PCB copper thermal relief (typically a 6x6 via array under the package tied to internal ground planes). Designers frequently underestimate the boot-mode configuration pins, which must be pulled high or low at reset via 4.7 kohm resistors to select the correct memory-map and boot source - failing to strap these correctly is the most common reason new boards do not boot.
Compliance Information
RoHS compliant and lead-free per the Freescale/NXP product page and DigiKey listing. Halogen-free and conflict-minerals status are not explicitly published for the obsolete MPC87x family - set to 'unknown' rather than fabricated.