OPA858IDSGR - 5.5GHz GBWP FET-Input TIA Amplifier | Texas Instruments
MPN: OPA858IDSGR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.49 | $3.49 |
| 10 | $3.31 | $33.10 |
| 100 | $3.15 | $315.00 |
| 500 | $2.92 | $1,460.00 |
| 1,000 | $2.74 | $2,740.00 |
OPA858IDSGR Overview
A transimpedance amplifier is an operational amplifier topology that converts a current input, typically from a photodiode, into a proportional voltage output. Within the amplifier hierarchy, the OPA858 belongs to the high-speed, FET-input operational amplifier family, part of the broader class of analog signal conditioning ICs. Its 5.5 GHz GBWP enables high closed-loop bandwidths at transimpedance gains in the range of tens to hundreds of kilohms, making it ideal for optical front-end receiver chains.
Key features include a low input voltage noise of 2.5 nV/sqrt(Hz), extremely low input bias current from the FET input stage, and a high slew rate for fast settling on pulsed signals. The decompensated architecture delivers higher bandwidth at closed-loop gains of 7 V/V or greater compared to unity-gain-stable amplifiers, but requires careful feedback network design to guarantee stability.
The CMOS input stage provides extremely high input impedance, essential for accurate current-to-voltage conversion in photodiode applications. The small WSON-8 package with exposed thermal pad minimizes parasitic inductance and aids heat dissipation, both critical at gigahertz-class bandwidths.
Typical applications include LIDAR receivers, optical network receivers, high-speed data acquisition, and test and measurement equipment. The device also buffers high-speed DAC outputs and drives high-speed ADC input stages.
When designing with the OPA858, select the feedback capacitor carefully to optimize the bandwidth-stability trade-off, minimize parasitic capacitance at the inverting input through tight PCB layout, and solder the exposed pad to a solid ground plane. Pricing reference: approximately $3.15 at LCSC as of 2026-08-30.
Drop-in alternatives for OPA858IDSGR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with OPA858IDSGR (same form factor and footprint) — differing in Amplifier Type, Input Type, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
OPA858QIDSGRQ1
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →OPA855IDSGR
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
OPA856IDSGR
⚡ Same Package ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
OPA858IDSGR Maximum Ratings & Electrical Characteristics
| Amplifier Type | Decompensated FET-Input Transimpedance / Voltage Amplifier |
| Gain Bandwidth Product | 5.5 GHz |
| Number of Channels | 1 |
| Input Type | CMOS (FET) |
| Supply Voltage Range | 3.3 V to 5.25 V |
| Input Voltage Noise | 2.5 nV/sqrt(Hz) |
| Minimum Stable Gain | 7 V/V |
| Operating Temperature | -40C to +125C |
| Package | WSON-8 (DSG) 2x2 mm with exposed pad |
| Mounting Type | Surface Mount |
| Output Type | Single-Ended |
| Automotive Qualification | Standard grade (Q1 variant available: OPA858QIDSGRQ1) |
OPA858IDSGR Pin Configuration
| Pin 1 | OUT — Amplifier output |
| Pin 2 | V- — Negative supply / ground |
| Pin 3 | IN+ — Non-inverting input |
| Pin 4 | IN- — Inverting input |
| Pin 5 | V+ — Positive supply (3.3V to 5.25V) |
| Pin 6 | DISABLE — Power-down control pin |
| Pin 7 | NC — No connect |
| Pin 8 | NC — No connect |
| Pin Pad | Thermal Pad — Exposed pad - solder to ground plane for heat dissipation and low inductance |
Typical Applications
OPA858IDSGR is suitable for 6 applications: LIDAR Receiver Front End, Optical Network Receivers, High-Speed Data Acquisition, Test and Measurement Equipment, High-Speed DAC Output Buffering, Photodiode Sensing for Industrial Automation.
LIDAR Receiver Front End
The OPA858IDSGR's 5.5 GHz GBWP and 2.5 nV/sqrt(Hz) noise make it ideal for pulsed LIDAR TIA front ends, where nanosecond return-pulse resolution directly determines range accuracy. Configured as a TIA with photodiode at the inverting input and feedback resistances of tens to hundreds of kilohms, it achieves closed-loop bandwidths of hundreds of MHz. The FET input minimizes bias-current error on the photodiode, and the decompensated architecture maximizes bandwidth at practical TIA gains.
Recommended
Optical Network Receivers
In fiber-optic receiver chains, the OPA858IDSGR converts photodiode current into voltage with sufficient bandwidth for high data-rate links. Its 5.5 GHz GBWP supports tens-to-hundreds of kilohm transimpedance gains with bandwidths well into the hundreds of MHz, while the 2.5 nV/sqrt(Hz) input noise preserves receiver sensitivity and bit-error-rate margin. The WSON-8 exposed-pad package minimizes parasitic inductance that would otherwise limit gigahertz-class performance in compact optical modules.
Recommended
High-Speed Data Acquisition
The OPA858IDSGR serves as a wideband driver or gain stage ahead of high-speed ADCs, providing the 7 V/V minimum gain its decompensated architecture requires while contributing only 2.5 nV/sqrt(Hz) of input noise. Operating from a 3.3V to 5.25V supply, it interfaces directly with modern low-voltage signal chains. Its high slew rate settles pulsed inputs quickly, preserving sample accuracy in oscilloscope front ends and automated test equipment channels.
Recommended
Test and Measurement Equipment
Bench instruments, spectrum analyzer front ends, and probe amplifiers benefit from the OPA858IDSGR's combination of 5.5 GHz GBWP, low FET-input bias current, and 2.5 nV/sqrt(Hz) noise. The FET input presents high impedance to devices under test, minimizing circuit loading, while the wide bandwidth preserves signal fidelity for fast edges. The 2x2 mm WSON-8 package enables dense multi-channel instrument layouts with short signal paths.
Recommended
High-Speed DAC Output Buffering
The OPA858IDSGR buffers current-output or fast voltage-output DACs, converting output current to voltage with gain of 7 V/V or more and bandwidth far above the DAC update rate. Its low noise floor keeps the buffer from dominating the DAC's signal-to-noise ratio, and the high slew rate handles full-scale output transitions without slew-induced distortion. The 3.3V to 5.25V supply range matches common DAC supplies, simplifying rail architecture.
Recommended
Photodiode Sensing for Industrial Automation
Industrial optical sensors - break-beam detectors, encoders, and proximity sensors - use the OPA858IDSGR as a TIA where fast photodiode signals must be converted with minimal added noise. The FET input's negligible bias current avoids photodiode leakage-error drift over the -40C to +125C range, and the 5.5 GHz GBWP supports short response times needed for high-speed counting and positioning. Industrial 3.3V/5V rails power the device directly.
Recommended
Recommended Products Summary
Engineering reference data for OPA858IDSGR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | OPA858QIDSGRQ1 | OPA855IDSGR | OPA856IDSGR |
|---|---|---|---|---|
| Package | WSON-8 (DSG) 2x2 mm | WSON-8 (DSG) 2x2 mm - same | WSON-8 (DSG) 2x2 mm - same | WSON-8 (DSG) 2x2 mm - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Minimum Stable Gain | 7 V/V | 7 V/V | 7 V/V | 1 V/V (unity-gain stable) |
| Supply Voltage | 3.3V to 5.25V | 3.3V to 5.25V | 3.3V to 5.25V | 3.3V to 5.25V |
| Temperature Range | -40C to +125C | -40C to +125C | -40C to +125C | -40C to +125C |
| AEC-Q100 Qualification | No | Yes (Grade 1) | No | No |
Key Differentiators
- Automotive-qualified sibling available as true drop-in (vs OPA858QIDSGRQ1)
- Lower input voltage noise than higher-bandwidth family member (vs OPA855IDSGR)
- Maximum bandwidth in the TI decompensated FET family (vs OPA856IDSGR)
Design Notes
The OPA858 is a decompensated 5.5 GHz amplifier - parasitics dominate performance. Keep the feedback loop area minimal: place the feedback resistor and capacitor directly across pins 4 and 1 with sub-millimeter traces. Cut out the ground plane under the inverting input node to reduce parasitic capacitance, which otherwise lowers the achievable TIA bandwidth and can destabilize the loop. The 2x2 mm WSON (DSG) footprint requires via-in-pad or short vias to the ground plane.
Decouple V+ with at least 100 nF ceramic placed within 2 mm of pin 5, plus a bulk 1 uF to 4.7 uF capacitor nearby. At 5.25V supply the total power dissipation is modest, but the exposed thermal pad must be soldered to a solid ground plane - it is both the thermal path and the RF ground return. Do not share the analog ground return with high-current digital switching traces.
The OPA858 requires a minimum closed-loop gain of 7 V/V; using it as a unity-gain buffer will cause oscillation. In TIA configurations, the feedback capacitor value sets the stability boundary - calculate Cf based on photodiode capacitance, feedback resistance, and amplifier input capacitance per the TI datasheet TIA design procedure, then verify peaking on the bench across process and temperature corners before release.
Compliance Information
Standard-grade part; AEC-Q100 qualified version is the OPA858QIDSGRQ1. RoHS/REACH status not present in provided data - verify on TI.com product page.
