PIC18F25Q10-I/SS - 8-bit 64MHz 32KB Flash MCU | Microchip
MPN: PIC18F25Q10-I/SS ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.45 | $2.45 |
| 10 | $2.18 | $21.80 |
| 100 | $1.92 | $192.00 |
| 500 | $1.68 | $840.00 |
| 1,000 | $1.45 | $1,450.00 |
PIC18F25Q10-I/SS Overview
Background Knowledge: A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile working memory (RAM), peripheral interfaces and often analog blocks into one package. The PIC18 family is Microchip's 8-bit RISC architecture, optimized for low-power deterministic control in cost-sensitive embedded designs. 8-bit microcontrollers occupy the hypernym hierarchy 8-bit MCU -> microcontroller -> embedded processor -> semiconductor. They remain preferred over 32-bit devices in applications requiring simple deterministic control loops, ultra-low sleep current, or low unit cost.
Key features of the PIC18F25Q10 include eXtreme Low Power (XLP) technology with nanoWatt sleep currents, Core Independent Peripherals (CIPs) such as CWG and HLT that offload tasks from the CPU, and configurable logic cells. It supports up to 24 ADC channels at 10-bit resolution, a 5-bit DAC, two comparators with selectable references, multiple PWM modules and a Complementary Waveform Generator (CWG) suited for power-conversion feedback loops.
Typical applications include industrial control, robust sensor nodes, consumer appliances, automotive body electronics, touch sensing and Internet of Things (IoT) edge nodes. The 5 V operation increases noise immunity for factory-floor installations, while the XLP peripherals make it suitable for battery-powered smart sensors.
Designers should allocate the 28-pin SSOP footprint's I/O budget carefully: pin count constrains simultaneous peripheral use, and the 32 KB Flash supports roughly 16-20 KB of C application code after the bootloader reserves space. Programming is supported via Microchip's MPLAB X IDE and XC8 compiler, with ICD headers for in-circuit debug.
Drop-in alternatives for PIC18F25Q10-I/SS — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F25Q10-I/SS (same form factor and footprint) — differing in ADC, Package, DAC, Program Memory (Flash), Comparators.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F24Q10-I/SS
✅ Drop-In✓ In Stock
$1.18 / Unit
View Datasheet →PIC18F25Q10-E/SS
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F25Q10-I/SSVAO
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F27Q43-I/SS
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F25Q10-I/SS Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18 8-bit RISC |
| Maximum CPU Frequency | 64 MHz |
| Performance (MIPS) | 16 MIPS |
| Program Memory (Flash) | 32 KB (32K x 8) |
| Data SRAM | 2 KB |
| Data EEPROM | 256 Bytes |
| Operating Voltage Range | 2.3 V to 5.5 V |
| ADC | 10-bit, up to 24 channels |
| DAC | 5-bit, 1 channel |
| Comparators | 2 with selectable reference |
| PWM Modules | Multiple (10-bit/16-bit) |
| Package | 28-pin SSOP |
| Mounting Type | Surface Mount |
| Operating Temperature | -40 C to +85 C (Industrial) |
| RoHS Status | Compliant |
PIC18F25Q10-I/SS Pin Configuration
| Pin 1 | MCLR — Master Clear (reset) input, active low |
| Pin 2 | RA0 — Analog/Digital I/O, AN0 |
| Pin 3 | RA1 — Analog/Digital I/O, AN1 |
| Pin 4 | RA2 — Analog/Digital I/O, AN2 |
| Pin 5 | RA3 — Analog/Digital I/O, AN3, VREF+ |
| Pin 6 | RA4 — Analog/Digital I/O, AN4 |
| Pin 7 | RA5 — Analog/Digital I/O, AN5 |
| Pin 8 | RA6 — Digital I/O, OSC2 |
| Pin 9 | RA7 — Digital I/O, OSC1 |
| Pin 10 | VSS — Ground reference |
| Pin 11 | VDD — Positive supply voltage |
| Pin 12 | RB0 — Digital I/O, INT0 |
| Pin 13 | RB1 — Digital I/O, INT1 |
| Pin 14 | RB2 — Digital I/O |
| Pin 15 | RB3 — Digital I/O |
| Pin 16 | RB4 — Digital I/O |
| Pin 17 | RB5 — Digital I/O, ICDPGM |
| Pin 18 | RB6 — Digital I/O, ICD PGC (clock) |
| Pin 19 | RB7 — Digital I/O, ICD PGD (data) |
| Pin 20 | VSS — Ground reference |
| Pin 21 | VDD — Positive supply voltage |
| Pin 22 | RC0 — Digital I/O, AN16 |
| Pin 23 | RC1 — Digital I/O, AN17 |
| Pin 24 | RC2 — Digital I/O, AN18 |
| Pin 25 | RC3 — Digital I/O, AN19 |
| Pin 26 | RC4 — Digital I/O, AN20 |
| Pin 27 | RC5 — Digital I/O, AN21 |
| Pin 28 | RC6 — Digital I/O, AN22, TX |
| Pin 29 | RC7 — Digital I/O, AN23, RX |
| Pin 30 | RE3 — Digital I/O, AN23 (Note: per datasheet, this position may differ; verify) |
Typical Applications
PIC18F25Q10-I/SS is suitable for 6 applications: Industrial Sensor Nodes, Home Appliance Control, Automotive Body Electronics, IoT Edge Devices, Touch Sensing Interfaces, Power Conversion Feedback.
Industrial Sensor Nodes
The PIC18F25Q10-I/SS fits industrial sensor nodes thanks to its 5 V native operation, which increases noise immunity on factory floors where long cable runs pick up EMI. Its 10-bit ADC with up to 24 channels and 5-bit DAC interface directly with thermocouples, RTDs, 4-20 mA loops and bridge sensors without external signal conditioning. The XLP peripherals keep sleep current in the microamp range, enabling multi-year battery life on wireless sensor nodes. Placed at the edge of a Modbus RTU or IO-Link network, the F25Q10's 16 MIPS core handles local averaging, threshold detection and CIP-driven interrupt response without waking the main CPU. Designers benefit from CIPs (CWG, HLT) that execute filter and timing tasks in hardware, freeing the core for protocol handling.
Recommended
Home Appliance Control
The PIC18F25Q10-I/SS is well matched for white-goods appliance control such as washing machines, dishwashers and induction cooktops, where its 5 V I/O tolerance interfaces directly with triac-driving optocouplers and zero-cross detectors. The CWG (Complementary Waveform Generator) and multiple PWM channels drive motor speed controllers and PFC stages without external logic. The 256-Byte EEPROM stores user settings and fault logs across power cycles. Operating from -40 C to +85 C industrial range, it survives the thermal environment of an enclosed appliance chassis. Core Independent Peripherals (CIPs) implement safety interlocks in hardware, reducing firmware complexity and improving response time over software polling.
Recommended
Automotive Body Electronics
The PIC18F25Q10-I/SS in its VAO automotive variant is qualified for body-electronics applications such as seat controllers, mirror modules, lighting drivers and HVAC blend-door actuators. The 10-bit ADC reads potentiometer inputs and current-sense shunts for closed-loop position control, while the 5-bit DAC sets reference thresholds for comparator-based diagnostics. The CIPs implement windowed watchdog timing (WWDT) and hardware fault response required by automotive safety standards. With 32 KB Flash and 2 KB SRAM, the F25Q10 supports LIN protocol stacks and OBD-II diagnostic routines in firmware. The 28-pin SSOP provides enough I/O for multi-channel PWM driving of LED matrix lighting with smooth dimming.
Recommended
IoT Edge Devices
The PIC18F25Q10-I/SS is suitable for IoT edge devices that bridge low-power sensor front-ends to wireless modules such as LoRa, Sub-GHz or BLE transceivers. Its XLP nanoWatt sleep currents and CIP-driven wake-on-event allow the MCU to spend most of its time asleep, only waking to sample sensors and forward data. The 32 KB Flash supports MQTT-SN or proprietary RF protocol stacks, while the 10-bit ADC and 5-bit DAC interface with environmental sensors (temperature, humidity, gas). The 28-pin SSOP footprint leaves enough GPIO for SPI/UART control of the radio module alongside local indicator LEDs. Designers often pair the F25Q10 with a Cortex-M0 host for hybrid compute, offloading deterministic I/O handling to the PIC18.
Recommended
Touch Sensing Interfaces
The PIC18F25Q10-I/SS handles projected capacitive and inductive touch sensing via its mTouch peripheral module and CTMU (Charge Time Measurement Unit), enabling button, slider and wheel interfaces with up to 24 channels on the SSOP-28 variant. The hardware CIP (HLT - Hardware Limit Timer) implements debounce and proximity hysteresis in hardware, eliminating software polling jitter. Designers can implement sealed-key designs for kitchen appliances and outdoor equipment where mechanical switches are unreliable. The 5 V operation improves signal-to-noise ratio against humidity and surface contamination, while the XLP sleep mode keeps idle power below 5 uA for battery-powered remote controls.
Recommended
Power Conversion Feedback
The PIC18F25Q10-I/SS fits secondary-side feedback loops in isolated DC-DC converters and digital power supplies, where its CWG generates isolated gate-drive waveforms and its 10-bit ADC samples output voltage and current with 1 LSB resolution. The 64 MHz core and 16 MIPS throughput execute digital compensator loops (PID, state-space) faster than legacy PIC16 parts, improving transient response. Hardware CIPs (CWG, NCO) synthesize stable PWM frequencies independent of CPU load. The 32 KB Flash fits lookup tables and adaptive control firmware, while 256 Bytes EEPROM stores calibration coefficients. The 5 V operation interfaces directly with opto-isolated feedback paths and shunt amplifiers.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F25Q10-I/SS — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F24Q10-I/SS | PIC18F25Q10-E/SS | PIC18F25Q10-I/SSVAO | PIC18F27Q43-I/SS |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-SSOP | 28-SSOP | 28-SSOP | 28-SSOP | 28-SSOP |
| Flash Memory | 32 KB | 16 KB | 32 KB | 32 KB | 64 KB |
| SRAM | 2 KB | 2 KB | 2 KB | 2 KB | 4 KB |
| Max CPU Frequency | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) |
| Operating Voltage | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +125 C | -40 C to +125 C (automotive) | -40 C to +85 C |
| ADC | 10-bit, 24 ch | 10-bit, 24 ch | 10-bit, 24 ch | 10-bit, 24 ch | 12-bit, 24 ch |
Key Differentiators
- 32 KB Flash vs 16 KB in sibling F24Q10 (vs PIC18F24Q10-I/SS)
- Industrial -40C to +85C with full automotive line available (vs PIC18F25Q10-I/SSVAO)
- Core Independent Peripherals (CIPs) including CWG and HLT (vs PIC18F27Q43-I/SS)
Design Notes
Place decoupling capacitors as close to VDD/VSS pairs as possible: a 100 nF ceramic on each VDD pin (pins 11 and 21) plus a bulk 1-10 uF tantalum or ceramic at the supply entry. A ferrite bead or small inductor between digital and analog VDD reduces switching-noise injection into the ADC reference. The MCLR pin (pin 1) requires a 10 kohm pull-up to VDD; if unused as reset, tie through a 10 kohm resistor only - do not leave it floating.
The 10-bit ADC achieves rated accuracy only with proper analog supply conditioning. Use a separate AVSS/AVDD trace from the noisy digital rails, and keep analog traces short. Place the 100 nF and 1 uF caps at the analog reference pin (RA3/AREF) within 5 mm. For high-impedance sensor sources, enable the ADC acquisition time to 4 us or longer to settle the internal sample capacitor; faster acquisitions cause gain errors at high source impedance.
Configuration bits (CONFIG1-CONFIG5) must be set correctly before any code runs - in particular the oscillator selection, MCLR enable, and watchdog timer. A wrong CONFIG setting can lock the device or cause it to run at unintended speeds. Verify ICD pins (RB6/RB7) are not repurposed as outputs in the application, or in-circuit debug will fail. The 32 KB Flash requires the full address range to be erased/programmed for ICD - use MPLAB X IPE for proper programming.
Compliance Information
Standard PIC18F25Q10-I/SS is RoHS/REACH compliant per Microchip product page. Not AEC-Q100 qualified - choose PIC18F25Q10-I/SSVAO variant for automotive applications.
