PN7161B1HN-C100E - NFC Controller with NCI, Apple ECP | NXP
MPN: PN7161B1HN-C100E ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.88 | $7.88 |
| 10 | $7.1 | $71.00 |
| 100 | $6.05 | $605.00 |
| 500 | $5.2 | $2,600.00 |
| 1,000 | $4.45 | $4,450.00 |
PN7161B1HN-C100E Overview
An NFC controller (also called an NFC front-end or NCI controller) is a semiconductor that sits between a host processor and an NFC antenna, handling the 13.56 MHz RF link, ISO protocol stack, and cryptography offload so that the application processor can speak to the reader through a standardized high-level interface (NCI). Within the system hierarchy, it sits at the interconnect layer: NFC controller -> NFC front-end -> wireless connectivity IC -> semiconductor. It enables contactless payments, ticketing, access control, and peer-to-peer data exchange without burdening the application MCU with real-time RF processing.
Key features include full EMV L1 compliance, NCI 1.0 host interface, integrated firmware (PN7161B1HN/C100E bundle), Apple ECP support, automatic ECP handling for Apple Pay, automatic antenna tuning via the integrated VDD_TX driver, low-power standby mode with polling, and on-chip EMC filtering. The device supports both 1.8V and 3.3V host logic via separate supply pins (VDD_IO and VDD), simplifying integration with modern application processors without level shifters.
The PN7161B1HN/C100E firmware adds turnkey EMV payment stack handling and Apple Wallet ECP behavior, dramatically reducing host-side software development. Compared to the PN7160, the PN7161 adds Apple ECP support after formal authorization. Compared to discrete RF front-ends (e.g. discrete NFC reader ICs without integrated firmware), the PN7161B1HN-C100E delivers a smaller BOM, simpler EMC compliance path, and faster time to market for payment terminals.
Typical applications include point-of-sale (POS) terminals, mobile payment readers, access control readers, transit ticketing terminals, NFC-enabled IoT hubs, and Apple Pay-compatible accessory products. In each case the controller integrates seamlessly into designs that already have a host MCU running Linux, Android, or an RTOS, with NCI driver support available from NXP and mainline Android.
When designing with this part, follow NXP application note AN11892 for the antenna matching network and reference the OM27160 evaluation board for the certified antenna design. Pay attention to the exposed-pad (EP) PCB land pattern for thermal dissipation and RF grounding, and verify that the host NCI driver is matched to the firmware bundle revision indicated on the top marking.
This page synthesizes distributor pricing, drop-in pin-compatible NXP family alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for PN7161B1HN-C100E — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PN7160B1HN/C100
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161A1HN/C100
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161B1HN/C100
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161B1HN-C100E Specifications (manufacturer-published)
| Function | NFC Controller with NCI Interface |
| Operating Frequency | 13.56 MHz |
| Supported Standards | FeliCa, ISO 14443, ISO 15693, MIFARE, NFC Forum, EMV L1 |
| Host Interface | SPI (NCI 1.0) |
| Supply Voltage VDD | 3.0 V to 3.6 V |
| Supply Voltage VDD_IO | 1.65 V to 1.95 V |
| Package | HVQFN-40 (6x6 mm) Exposed Pad |
| Mounting Type | Surface Mount |
| MSL Level | 3 |
| Peak Reflow Temperature | 260 C |
| Firmware Bundle | PN7161B1HN/C100E (EMV L1 + Apple ECP) |
| Compliance | EMV L1 Compliant, Apple ECP Authorized |
| RoHS Status | Compliant |
| Antenna Tuning | Integrated VDD_TX driver, automatic tuning |
| Operating Temperature | -30 C to +85 C |
PN7161B1HN-C100E Pin Configuration
| Pin 1 | VDD_IO — Host interface supply (1.65V to 1.95V) |
| Pin 2 | SPI_CLK — SPI clock from host |
| Pin 3 | SPI_MOSI — SPI data input from host |
| Pin 4 | SPI_MISO — SPI data output to host |
| Pin 5 | SPI_NSS — SPI chip select (active low) |
| Pin 6 | IRQ — Host interrupt output |
| Pin 7 | VEN — Voltage enable for host-side power sequencing |
| Pin 8 | RESETN — Reset input (active low) |
| Pin 9 | GPIO0 — General-purpose I/O 0 |
| Pin 10 | GPIO1 — General-purpose I/O 1 |
| Pin 11 | GPIO2 — General-purpose I/O 2 |
| Pin 12 | GPIO3 — General-purpose I/O 3 |
| Pin 13 | NC — Not connected (per datasheet) |
| Pin 14 | NC — Not connected (per datasheet) |
| Pin 15 | ANT1 — Differential antenna connection 1 |
| Pin 16 | ANT2 — Differential antenna connection 2 |
| Pin 17 | TX1 — Transmitter output 1 |
| Pin 18 | TX2 — Transmitter output 2 |
| Pin 19 | VDD_TX — Transmitter supply (driven by internal LDO for antenna tuning) |
| Pin 20 | RXP — Receiver positive input |
| Pin 21 | RXN — Receiver negative input |
| Pin 22 | AVDD — Analog supply (filtered) |
| Pin 23 | AVSS — Analog ground |
| Pin 24 | DAC — DAC reference for trimming |
| Pin 25 | AUX — Auxiliary ADC input |
| Pin 26 | VSS — Ground |
| Pin 27 | VDD — Main supply (3.0V to 3.6V) |
| Pin 28 | VSS — Ground |
| Pin 29 | VSS — Ground |
| Pin 30 | CLK_XTAL1 — Crystal oscillator input |
| Pin 31 | CLK_XTAL2 — Crystal oscillator output |
| Pin 32 | NFCC_CLK — NFC controller clock output |
| Pin 33 | NC — Not connected (per datasheet) |
| Pin 34 | NC — Not connected (per datasheet) |
| Pin 35 | TEST — Test pin (factory use, leave open in application) |
| Pin 36 | NC — Not connected (per datasheet) |
| Pin 37 | NC — Not connected (per datasheet) |
| Pin 38 | NC — Not connected (per datasheet) |
| Pin 39 | NC — Not connected (per datasheet) |
| Pin 40 | NC — Not connected (per datasheet) |
Power & Thermal Characteristics
| Power Input | 3.0 V to 3.6 V |
| Operating Temperature | -30 C to +85 C |
Power input and thermal parameters for PN7161B1HN-C100E as published by the manufacturer.
Typical Applications
PN7161B1HN-C100E is suitable for 6 applications: Point-of-Sale (POS) Terminal, Mobile Payment Reader, Access Control Reader, Transit Ticketing Terminal, NFC-Enabled IoT Hub, Apple Pay-Compatible Accessory.
Point-of-Sale (POS) Terminal
The PN7161B1HN-C100E is purpose-built for EMV L1 contactless POS terminals. The /C100E firmware bundle contains the certified EMVCo L1 protocol stack, while the integrated Apple ECP routines handle Apple Wallet contactless interactions automatically. The 13.56 MHz front-end meets ISO 14443 and ISO 15693 requirements for global card acceptance. The device draws standby current low enough for battery-powered mobile POS terminals while its VDD_TX driver eliminates the external power amplifier typical in discrete designs. Pin-compatible with PN7160B1HN/C100 on the HVQFN-40 footprint, it enables a single PCB layout to support both EMV-certified and NFC-Forum-only product variants.
Recommended
Mobile Payment Reader
Small-form-factor mobile card readers benefit from the PN7161B1HN-C100E's integrated firmware and minimal BOM. The HVQFN-40 6x6 mm package is small enough for pocket-sized readers, and the exposed-pad footprint simplifies thermal management in sealed enclosures. With supply rails of 3.0-3.6V and 1.65-1.95V, it interfaces directly to a lithium-ion battery plus a 1.8V host MCU without level shifters. The integrated VDD_TX driver automatically tunes the antenna to optimize read range across different terminal environments. The /C100E firmware bundle supports Apple Pay, Google Pay, and other major mobile wallets out of the box.
Recommended
Access Control Reader
Building access control and corporate ID readers benefit from the PN7161B1HN-C100E's multi-protocol support - ISO 14443, ISO 15693, MIFARE, and FeliCa - enabling a single reader SKU to interoperate with the major corporate badge formats worldwide. The NCI 1.0 host interface over SPI allows the door controller MCU to run standard access-control software while the PN7161 handles all RF and cryptography processing. Low standby current keeps door readers within constant-on power budgets. The HVQFN-40 EP footprint simplifies ruggedized outdoor reader designs with its RF-grounded thermal pad.
Recommended
Transit Ticketing Terminal
Transit validators require robust multi-protocol NFC with fast transaction times. The PN7161B1HN-C100E's 13.56 MHz operation supports open-loop EMV transit (where deployed), closed-loop MIFARE ticketing, and FeliCa systems (used in Japan). The /C100E firmware's automatic ECP handling reduces transaction latency when commuters tap Apple Wallet devices. The integrated antenna tuning compensates for environmental detuning caused by metallic validator housings. With its compact HVQFN-40 footprint, it fits inside bus validators, turnstile readers, and handheld ticket inspectors without board-space penalty.
Recommended
NFC-Enabled IoT Hub
An IoT hub or gateway can use the PN7161B1HN-C100E to add NFC commissioning, configuration, and diagnostics via a smartphone tap. The integrated NCI driver support in mainline Android and Linux lets the hub's application processor expose NFC functionality with minimal host-side code. The PN7161's low-power standby mode allows the hub to remain tap-responsive without significantly impacting overall system power budget. NFC Forum tag types 1-5 plus P2P are all supported, enabling flexible commissioning workflows. The HVQFN-40 package fits easily alongside Wi-Fi/BLE combo modules in space-constrained gateway designs.
Recommended
Apple Pay-Compatible Accessory
Accessories such as door locks, parking meters, vending machines, and shared-mobility devices that need to interact with Apple Wallet require Enhanced Contactless Polling. The PN7161B1HN-C100E ships with the /C100E firmware bundle containing Apple ECP authorization, enabling these products to register as Apple Wallet readers after a formal Apple licensing step. The HVQFN-40 footprint allows miniaturized designs, and the integrated VDD_TX driver eliminates an external RF power amplifier. Supply voltages of 3.3V and 1.8V allow direct connection to common IoT host MCUs without additional level-shifting circuitry.
Recommended
Recommended Products Summary
Engineering reference data for PN7161B1HN-C100E — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PN7160B1HN/C100 | PN7161A1HN/C100 | PN7161B1HN/C100 |
|---|---|---|---|---|
| Package | HVQFN-40 (6x6 mm) EP | HVQFN-40 (6x6 mm) EP - same | HVQFN-40 (6x6 mm) EP - same | HVQFN-40 (6x6 mm) EP - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Host Interface | SPI (NCI 1.0) | SPI (NCI 1.0) | SPI (NCI 1.0) | SPI (NCI 1.0) |
| Operating Frequency | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz |
| Apple ECP Support | Yes (in /C100E firmware) | No | Yes (in /C100 firmware) | Yes (in /C100E firmware) |
| EMV L1 Stack | Yes (in /C100E firmware) | Optional | No | Yes |
| Supply Voltage VDD | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
Key Differentiators
- EMV L1 + Apple ECP in a single firmware bundle (vs PN7160B1HN/C100)
- Same HVQFN-40 footprint across the PN7160/PN7161 family (vs PN7161A1HN/C100)
- Integrated VDD_TX driver eliminates external PA (vs ST25R3916)
Design Notes
The HVQFN-40 exposed pad (EP) is the primary RF ground reference and the primary thermal dissipation path. Per NXP application note AN11892, place a via array directly under the EP (typically 9 to 16 vias on a 0.5 mm grid, stitched to a continuous RF ground plane on the inner PCB layer). A broken or missing EP connection degrades antenna tuning, increases harmonic emissions, and can cause EMV L1 certification failures. Keep the differential ANT1/ANT2 traces matched in length and impedance (typically 50 ohms differential).
Provide clean, low-noise supplies on both VDD (3.3V) and VDD_IO (1.8V). Place a 100 nF decoupling capacitor as close as possible to each supply pin, plus a bulk 1 uF to 4.7 uF ceramic on the VDD pin. The integrated VDD_TX LDO powers the antenna driver - do not back-drive it from an external supply. Use a star-ground topology from a ferrite bead between digital and RF ground returns if the host board has noisy digital circuitry. Power sequencing is not required between VDD and VDD_IO for the PN7161B1HN-C100E.
Three common integration pitfalls: (1) using a non-NXP-bundled firmware on a counterfeit PN7161B1HN-C100E - always source from authorized distributors and verify the top marking matches the firmware bundle. (2) Forgetting to load the NCI driver on the host - mainline Android/Linux has it, but bare-metal RTOS hosts require porting the NXP NCI driver. (3) Skipping the Apple ECP licensing step - the firmware enables ECP routines, but Apple Wallet interoperability requires registration in the Apple Accessory Protocol program before commercial deployment.
Estimated: continuous transmit at maximum VDD_TX drive into a 50-ohm antenna load dissipates roughly 200-400 mW in the IC, depending on tuning. With the HVQFN-40 EP attached to a 1 square inch copper pour on a 4-layer FR-4 board, theta_JA is approximately 25 C/W, yielding a junction temperature rise of 5-10 C above ambient. For sealed enclosures with limited airflow, consider increasing the EP copper area to 2 square inches or adding thermal vias to inner planes.
Compliance Information
RoHS compliant per TrustedParts and NXP product page. EMV L1 compliance achieved through /C100E firmware bundle. Apple ECP support requires formal Apple licensing.
