SN74ALS253 - Dual 4:1 Mux 3-State ALS TTL | Texas Instruments
MPN: SN74ALS253 β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.95 | $1.95 |
| 10 | $1.76 | $17.60 |
| 100 | $1.45 | $145.00 |
| 500 | $1.2 | $600.00 |
| 1,000 | $0.98 | $980.00 |
Drop-in alternatives for SN74ALS253 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
SN74AS253A
β Drop-Inπ Reference alternative (not in catalog)
SN54ALS253
β Drop-Inπ Reference alternative (not in catalog)
SN74LS253
β Drop-Inπ Reference alternative (not in catalog)
CD74HC253
β Drop-Inπ Reference alternative (not in catalog)
SN74F253
β Drop-Inπ Reference alternative (not in catalog)
MC74HC253A
β Drop-Inπ Reference alternative (not in catalog)
SN74ALS253 Maximum Ratings & Electrical Characteristics
| Function | Dual 1-of-4 Data Selector/Multiplexer with 3-State Outputs |
| Logic Family | ALS (Advanced Low-Power Schottky TTL) |
| Number of Elements | 2 |
| Channels per Element | 4:1 |
| Output Type | 3-State |
| Supply Voltage | 5 V (nominal TTL) |
| Propagation Delay | [DATA_NEEDED: typical propagation delay] |
| Output Control | Separate active-low OE per section |
| Select Inputs | Common A, B (2-bit binary select) |
| Operating Temperature | 0C to +70C (SN74 commercial) |
| Package Options | PDIP-16 (N), SOIC-16 (D), CERPACK, LCC (FK) |
| Mounting Type | Through Hole / Surface Mount (per suffix) |
| Military Variant | SN54ALS253 (J package) |
| Companion Family Part | SN74AS253A |
| RoHS Status | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete - last-time-buy exhausted, available via excess/broker stock |
SN74ALS253 Pin Configuration
| Pin 1 | 1OE β Output control for section 1 (active-low, 3-state enable) |
| Pin 2 | A β Select input A (common, LSB) |
| Pin 3 | 1I3 β Section 1 data input 3 |
| Pin 4 | 1I2 β Section 1 data input 2 |
| Pin 5 | 1I1 β Section 1 data input 1 |
| Pin 6 | 1I0 β Section 1 data input 0 |
| Pin 7 | 1Y β Section 1 3-state output |
| Pin 8 | GND β Ground |
| Pin 9 | 2Y β Section 2 3-state output |
| Pin 10 | 2I0 β Section 2 data input 0 |
| Pin 11 | 2I1 β Section 2 data input 1 |
| Pin 12 | 2I2 β Section 2 data input 2 |
| Pin 13 | 2I3 β Section 2 data input 3 |
| Pin 14 | B β Select input B (common, MSB) |
| Pin 15 | 2OE β Output control for section 2 (active-low, 3-state enable) |
| Pin 16 | VCC β Supply voltage (5V nominal TTL) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
SN74ALS253 is suitable for 6 applications: Bus-Organized System Data Selection, Parallel-to-Serial Data Conversion, n-Line to 1-Line Multiplexing, Legacy TTL System Maintenance and Repair, Data Acquisition Channel Selection, Address and Mode Selection in Control Logic.
Bus-Organized System Data Selection
The SN74ALS253 was designed explicitly for bus-organized systems: its 3-state outputs can interface with and drive shared data lines. Each 4-line section has an independent active-low output control, so two sections can time-share a single bus conductor. The ALS family's fast propagation and low loading fit TTL backplanes of legacy industrial controllers and test fixtures. Designers must ensure bus contention windows are managed by sequencing the OE pins and adding bus-hold or pull-up termination to prevent floating lines during high-impedance intervals.
Recommended
Parallel-to-Serial Data Conversion
By stepping the common select inputs A and B through binary states 00, 01, 10, 11, each multiplexer section converts 4-bit parallel data into a serial bit stream at the 3-state output. The SN74ALS253 datasheet lists parallel-to-serial conversion as a primary intended function. A counter driving the select lines at a fixed clock rate yields a deterministic output sequence; the ALS propagation delay (a few nanoseconds) supports multi-MHz scan rates in TTL-era datapaths, well beyond what standard LS parts sustained at similar power levels.
Recommended
n-Line to 1-Line Multiplexing
The datasheet notes the SN74ALS253 permits multiplexing from n lines to one line - cascading multiple devices expands 4:1 sections into 8:1, 16:1, or larger selectors using select decoding plus 3-state output enables. This suits legacy telemetry scanners, instrumentation front-end channel selectors, and industrial data-acquisition multiplexing. When cascading, the section OE pins act as hierarchy enables while A/B act as local row select; ALS output enable/disable times must be accounted for to avoid bus glitches during select transitions.
Recommended
Legacy TTL System Maintenance and Repair
A large installed base of industrial controls, avionics test sets, and telecom equipment built in the 1980s-1990s uses ALS-series logic. The SN74ALS253 remains relevant for board-level repair where timing budgets were characterized around ALS propagation windows. When sourcing becomes impossible, SN74AS253A offers a faster but threshold-compatible substitution, while LS253 trades speed margin for availability. Repair technicians should always verify select-to-output delay against the original datasheet limits before approving substitutes for fielded hardware.
Recommended
Data Acquisition Channel Selection
In legacy data-acquisition front ends, the SN74ALS253 selects among four analog-comparator or status-flag outputs per section, feeding a shared line to downstream ADC circuitry. The separate per-section OE supports two banks scanning eight signal sources into one acquisition line. Although modern designs favor CMOS muxes with lower charge injection, ALS parts offer deterministic TTL-level drive into logic inputs with nanosecond-scale switching and no analog-path degradation, since only logic signals pass through. Select-line glitches must be masked at the sampling clock to avoid capturing transients.
Recommended
Address and Mode Selection in Control Logic
Dual 4:1 selection in one 16-pin package lets designers implement mode or address steering: one section selects register outputs while the other selects control flags, sharing common A/B select lines from a microprocessor or sequencer. The independent OE pins allow software-controlled tri-stating so a CPU bus can take over the selected path. In ALS-era controller boards this reduced package count versus two single muxes. Designers should budget the ALS propagation and enable/disable times when interfacing to CPU strobes to guarantee setup margins.
Recommended
Recommended Products Summary
Engineering reference data for SN74ALS253 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | SN74AS253A | SN54ALS253 | SN74LS253 | CD74HC253 | SN74F253 |
|---|---|---|---|---|---|---|
| Package | PDIP-16 (N) / SOIC-16 (D) / CDIP-16 (J) | PDIP-16 / SOIC-16 | CDIP-16 (J) | PDIP-16 / SOIC-16 | PDIP-16 / SOIC-16 | PDIP-16 / SOIC-16 |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | onsemi |
| Logic Family | ALS TTL | AS TTL | ALS TTL (military) | LS TTL | HC CMOS | F TTL |
| Function | Dual 4:1 mux, 3-state outputs | Dual 4:1 mux, 3-state outputs | Dual 4:1 mux, 3-state outputs | Dual 4:1 mux, 3-state outputs | Dual 4:1 mux, 3-state outputs | Dual 4:1 mux, 3-state outputs |
| Supply Voltage | 5 V nominal TTL | 5 V nominal TTL | 5 V nominal TTL | 5 V nominal TTL | 2 V to 6 V | 5 V nominal TTL |
| Output Type | 3-state | 3-state | 3-state | 3-state | 3-state | 3-state |
| Operating Temperature | 0C to +70C | 0C to +70C | -55C to +125C | 0C to +70C | -55C to +125C (typ.) | 0C to +70C |
| Relative Speed/Power | Fast / low power (ALS) | Fastest / higher power | Same as this product | Slower / higher power than ALS | Medium / lowest power | Fastest class / highest TTL power |
| Lifecycle Status | Obsolete | Obsolete/NRND | Obsolete | Obsolete | Active | Obsolete |
Key Differentiators
- ALS speed-power balance (vs SN74LS253)
- Independent 3-state control per section (vs SN74ALS153)
- CMOS modern-production option exists (vs CD74HC253)
Design Notes
Decouple VCC (pin 16) to GND with 0.1uF ceramic placed within 10mm of the package, per standard TI TTL design practice in the ALS family datasheet. Bipolar TTL draws asymmetric supply transients on output switching; a 4.7uF bulk capacitor per 5-10 TTL packages on the board rail prevents ground bounce from corrupting tri-state bus data.
Never leave the 3-state outputs driving into a bus while another device is enabled - verify OE sequencing ensures break-before-make behavior. Tri-stated inputs on shared lines float to undefined levels; add 4.7k-10k pull-up or bus-hold resistors. Unused select combinations cannot occur here (A/B fully decode 4 inputs), but unused sections' inputs should be tied to VCC or GND, not left floating.
When substituting CD74HC253 in a TTL system, remember HC inputs switch at roughly half the supply voltage while TTL outputs guarantee only 2.4-2.7V VOH - marginal at 4.5V supply. Use HCT, add a pull-up, or confirm VOH/VIH margins per datasheets before adopting CMOS replacements in legacy ALS boards.
Compliance Information
Obsolete part manufactured before modern compliance declarations; no RoHS/REACH data in provided sources. Standard DIP/SOIC versions were historically tin-lead or lead-free depending on production lot. [DATA_NEEDED: compliance documentation]
