2ED21844S06JXUMA1 vs 6EDL04N02PRXUMA1 Comparação
Comparação detalhada lado a lado de 2ED21844S06JXUMA1 por Infineon e 6EDL04N02PRXUMA1 por Infineon. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | 2ED21844S06JXUMA1 | 6EDL04N02PRXUMA1 |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoria | Power MOSFET Drivers | Power MOSFET Drivers |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $1,68 | $2,32 |
| Driver Configuration | Half-Bridge | Half-bridge (3 high-side + 3 low-side) |
| Number of Drivers | 2 (high-side + low-side) | — |
| Input Type | Non-Inverting | — |
| Blocking Voltage (Voffset) | 650 V | — |
| Output Current (Source/Sink) | 2.5 A typical | — |
| Bootstrap Diode | Integrated | Integrated (BSD) on all 3 high-side drivers |
| Supply Voltage (VCC) | 10 V to 20 V [DATA_NEEDED: exact range] | — |
| Propagation Delay (Typ.) | 200 ns [DATA_NEEDED: matching value] | — |
| Input Logic Compatibility | TTL/CMOS 3.3 V and 5 V | CMOS / LSTTL, 3.3 V and 5 V |
| Undervoltage Lockout (UVLO) | Yes, both HS and LS rails | — |
| Shutdown Pin | Yes | — |
| Negative VS Transient Immunity | -100 V typical | — |
| Faixa de temperatura de operação | -40 C to +125 C | -40 °C to +125 °C |
| Encapsulamento | PG-DSO-14-49 (DSO-14) | PG-TSSOP-28 (28-pin, 4.40 mm width, exposed pad) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Nível MSL | [DATA_NEEDED: MSL level] | MSL3 (per JEDEC J-STD-020, [DATA_NEEDED: confirm level]) |
| Status RoHS | Compliant | Compliant |
| Product Type | — | 3-Phase Gate Driver IC |
| Maximum Blocking Voltage | — | +180 V (VS referenced to GND for high side) |
| Rated Supply Voltage (VCC) | — | 200 V class (operating range 10 V to 20 V on VCC) |
| Source Current (typ.) | — | 0.375 A |
| Sink Current (typ.) | — | 0.75 A |
| Over-Current Protection | — | Yes (single-shunt, ITRIP/CIN pin) |
| Enable Pin (EN) | — | Yes (active-high) |
| Fault Output (nFAULT) | — | Yes (active-low, open-drain) |
| Interlocking / Anti-shoot-through | — | Yes (built-in per phase pair) |
| Process Technology | — | Thin-film SOI (Silicon-On-Insulator) |
| Maximum Junction Temperature | — | +150 °C |
| Target Switches | — | MOSFETs up to 180 V, IGBTs up to 180 V |