EPM7128SQI100-10N vs EPM7128SQI100-10 Comparação

Comparação detalhada lado a lado de EPM7128SQI100-10N por Intel e EPM7128SQI100-10 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM7128SQI100-10N EPM7128SQI100-10
Marca Intel Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida NRND Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $15,90 $9,75
Family MAX 7000S MAX 7000S
Device Type CPLD - Complex Programmable Logic Device CPLD - Complex Programmable Logic Device
Macrocells 128 —
Usable Gates 2,500 (up to 5,000 usable in family) 2,500
Logic Array Blocks (LABs) 4 —
Maximum User I/Os 84 —
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Operating Frequency 100 MHz —
Counter Frequency (family max) 175.4 MHz —
Supply Voltage - Core (VCCINT) 5.0 V —
Supply Voltage - I/O (VCCIO) 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Technology CMOS, EEPROM-based configuration —
Encapsulamento 100-pin PQFP (Plastic Quad Flat Pack) —
Tipo de montagem Surface Mount —
Temperatura de operação -40C to +85C (Industrial grade, 'I' suffix) -40C to +85C (Industrial)
Programming Interface JTAG (IEEE Std. 1149.1) / ByteBlaster —
RoHS Compliance Compliant (lead-free, 'N' suffix) —
Macro Cells — 128
User I/Os — 84
Logic Blocks (LABs) — 8 (16 macrocells each)
Package Type — PQFP-100
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Internal Frequency — 125 MHz to 250 MHz
Counter Speed — Up to 175.4 MHz
Operating Voltage (VCC) — 5 V
Configuration Memory — EEPROM (non-volatile)
Program/Erase Cycles — 100 minimum
In-System Programming — Yes (JTAG IEEE 1149.1)
Logic Family — CMOS
I/O Compatibility — TTL-compatible, 5V/3.3V multi-voltage
Status RoHS — [DATA_NEEDED: RoHS status not in provided data]

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