M7AFS600-FGG256I vs AFS600-1FG256I Comparação
Comparação detalhada lado a lado de M7AFS600-FGG256I por Microchip Technology e AFS600-1FG256I por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
M7AFS600-FGG256I - 600K-Gate Mixed-Signal FPGA | Microchip
M7AFS600-FGG256I ✓ AtivoMicrochip Technology
AFS600-1FG256I - 600K-Gate Fusion Mixed-Signal FPGA | Microchip
AFS600-1FG256I ✓ AtivoComparação de especificações
| Parâmetro | M7AFS600-FGG256I | AFS600-1FG256I |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Family | Fusion Mixed-Signal FPGA | — |
| System Gates | 600K | 600,000 gates |
| User I/O | 119 | — |
| Encapsulamento | 256-LBGA (FBGA), 1 mm ball pitch | 256-LBGA, 1 mm pitch |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Maximum System Frequency | 1098.9 MHz (per distributor parametric listing) | — |
| Embedded Processor | ARM CoreMP7 | — |
| Fabric Type | Flash-based, non-volatile, instant-on | — |
| Analog Subsystem | Integrated configurable analog (per Microchip Fusion family page) | — |
| On-chip Flash Memory | Yes (large flash memory blocks, per Microchip Fusion family page) | — |
| Clock Management | Integrated clock generation and management circuitry (PLLs) | — |
| Temperature Grade | Industrial (I suffix) | — |
| Faixa de temperatura de operação | -40C to +85C (industrial grade standard range) | — |
| Tipo de montagem | Surface Mount | — |
| Packaging | Tray | — |
| Nível MSL | [DATA_NEEDED: MSL Level] | — |
| Thermal Resistance (theta_JA) | [DATA_NEEDED: Thermal Resistance] | — |
| Device Type | — | Fusion mixed-signal field-programmable gate array (FPGA) |
| Logic Family | — | Flash-based CMOS |
| I/O Count | — | 119 I/O |
| Tensão de alimentação | — | 1.5 V |
| Metal Layers | — | 7 layers |
| Contagem de pinos | — | 256 pins |
| Temperatura de operação | — | 0°C to 85°C |
| Configuration Memory | — | Nonvolatile flash |
| Power-Up Behavior | — | Live at power-up (LAPU) |
| Integrated Resources | — | Configurable analog, large flash memory blocks, clock generation and management |
| Programmable Logic | — | High-performance flash-based programmable logic |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | — | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |
| Junction Test Temperature | — | 100°C |