P1012NSE2HFB vs P1012NSN2HFB Comparação
Comparação detalhada lado a lado de P1012NSE2HFB por NXP Semiconductors e P1012NSN2HFB por NXP Semiconductors. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
NXP Semiconductors
P1012NSN2HFB - QorIQ P1012 800MHz e500v2 MPU | NXP | Networking
P1012NSN2HFB ⚠ Última compraComparação de especificações
| Parâmetro | P1012NSE2HFB | P1012NSN2HFB |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoria | Microcontrollers | Microcontrollers |
| Status do ciclo de vida | Última compra | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $52,75 | $49,85 |
| Processor Series | QorIQ P1 | — |
| Processor Core | PowerPC e500v2 | — |
| Number of Cores | 1 | 1 |
| Core Architecture | 32-Bit Power Architecture | 32-bit |
| Maximum Core Frequency | 800 MHz | — |
| Process Technology | 45 nm CMOS | 45 nm |
| Memory Controller | DDR2/DDR3 with ECC | DDR2/DDR3 with ECC |
| Ethernet | Integrated GbE (multiple MACs) | GbE (10/100/1000 Mbps) |
| PCIe Controllers | PCIe Gen 2 (x1/x2/x4) | — |
| USB | USB 2.0 (host + device) | USB 2.0 (dual port) |
| TDM Interfaces | 4 (T1/E1) | — |
| QUICC Engine (QE) | Yes (protocol offload) | — |
| SEC Security Accelerator | SEC 4.0 | — |
| Encapsulamento | 689-TEPBGA II (31x31 mm) with exposed thermal pad | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Operating Temperature (Tj) | 0C to +125C | — |
| Status RoHS | RoHS Compliant | RoHS Compliant |
| Lead Free Status | Lead Free | Lead Free |
| Packaging | Tray | Tray |
| Manufacturer | — | NXP Semiconductors |
| Series | — | QorIQ P1 |
| Core Processor | — | PowerPC e500v2 |
| Speed | — | 800 MHz |
| Co-processors / DSP | — | QUICC Engine (QE) |
| Connectivity | — | Ethernet, PCIe, USB, TDM, UART, I2C, SPI |
| PCIe | — | PCIe Gen1 (x1/x2) |
| Encapsulamento / Caixa | — | 689-TEPBGA II (31x31 mm) with exposed thermal pad |
| Temperatura de operação | — | 0 C to 125 C |
| Die Revision | — | 1.1 |
| Security | — | Hardware-accelerated cryptography |