XC3090L-8TQG176C vs XC3090L-6TQG176C Comparação
Comparação detalhada lado a lado de XC3090L-8TQG176C por Xilinx e XC3090L-6TQG176C por Xilinx. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Xilinx
XC3090L-8TQG176C - 320 CLB FPGA, 6K Gates, 80MHz, TQFP-176 | Xilinx
XC3090L-8TQG176C Obsolete
Comparação de especificações
| Parâmetro | XC3090L-8TQG176C | XC3090L-6TQG176C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $28,75 | $63,00 |
| Family | XC3000L Logic Cell Array | XC3000L Low-Voltage Logic Cell Array |
| Logic Cell Count (CLBs) | 320 | — |
| Equivalent Gates | 5,000 (6,000 max usable) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Maximum Operating Frequency | 80 MHz | — |
| Speed Grade | -8 | -6 (6 ns tpd) |
| Encapsulamento | TQFP-176 (TQG176) | TQG176 (Thin Quad Gull-Wing, 176 pins) |
| Process Technology | CMOS, low-voltage | — |
| Configuration Memory | Internal SRAM (reprogrammable) | SRAM (volatile, in-system programmable) |
| Configuration Modes | Serial, peripheral, master/slave parallel | — |
| I/O Standard | TTL-compatible | — |
| Temperatura de operação | Commercial (0C to +85C) | Commercial (0C to +70C) |
| Contagem de pinos | 176 | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | unknown (legacy family, pre-dates RoHS documentation conventions) |
| Series | — | XC3000L |
| Device | — | XC3090L |
| User I/O Count | — | 138 |
| Tensão de alimentação | — | 3.3 V |
| Combinatorial Logic Delay (tpd) | — | 6 ns |
| Family Differentiator | — | Low-voltage 3.3V core vs 5.0V XC3000A |
| Compatible Programming Tools | — | Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration |
| Lead Free | — | unknown |
| Pinout Type | — | Perimeter I/O ring with user I/O and dedicated configuration pins |