DP83869HMRGZT - 1G Ethernet PHY Transceiver | Texas Instruments
N.º da peça: DP83869HMRGZT ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $14.5 | $14,50 |
| 10 | $13.05 | $130,50 |
| 100 | $11.62 | $1.162,00 |
| 500 | $10.46 | $5.230,00 |
| 1.000 | $9.3 | $9.300,00 |
DP83869HMRGZT Visão geral
Background knowledge: a Gigabit Ethernet PHY is the physical-layer transceiver in the OSI seven-layer model that encodes/decodes Ethernet frames to and from electrical or optical signaling on copper or fiber media. The PHY bridges the digital MAC layer to the analog line, performing line equalization, echo cancellation, clock-data recovery, and link training. In the system hierarchy, a PHY sits below the MAC, above the connector/MDI, and forms part of the broader Network Interface Card (NIC), Switch, or Industrial Ethernet Equipment architecture. The DP83869HM family belongs to the Industrial Ethernet PHY category, optimized for harsh-environment immunity rather than office-style connectivity.
Key features include robust Electrostatic Discharge (ESD) protection exceeding 8 kV IEC 61000-4-2 direct-contact discharge, integrated MDI termination resistors, support for Energy-Efficient Ethernet (EEE) per IEEE 802.3az, and Time-Sensitive Networking (TSN) readiness. The device provides cable diagnostics with TDR-based fault location, programmable LED behavior for link/activity/speed status, and an MDIO management interface per IEEE 802.3 clause 22/45 for PHY register access.
Technically, the DP83869HMRGZT combines mixed-signal CMOS with on-chip DSP-based adaptive equalization, baseline wander correction, and a robust PLL clock recovery loop that maintains GigE line-locked operation across Cat-5e cable lengths up to 100 m. Internal LDOs generate the analog and digital core rails from a single external supply, simplifying the BOM. The device is rated for an extended industrial temperature range of -40C to +125C, suitable for fanless, sealed enclosures.
Typical applications include industrial Ethernet switches, Programmable Logic Controller (PLC) communications modules, grid infrastructure (IEC 61850-3) substation gateways, factory-automation line controllers, and ruggedized surveillance recorders. The dual copper/fiber interface also makes it appropriate for industrial protocol bridges (EtherCAT, PROFINET, EtherNet/IP) where a fiber uplink is needed for long-haul or noise-isolated segments.
Design consideration: the RGMII timing skew between MAC and PHY must be tuned per the datasheet's TX/RX clock-to-data delay register settings; mis-tuned skew at 1 Gbps is the most common source of intermittent CRC errors. Use the TI USB-2-MDIO tool plus the DP83869 EVM register scripts to verify default skew values for your MAC partner before locking the PCB layout.
This page synthesizes distributor pricing, drop-in alternatives, and practical PCB/MDIO design notes not consolidated in the manufacturer datasheet alone.
Alternativas drop-in para DP83869HMRGZT — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com DP83869HMRGZT (mesmo formato e footprint) — diferindo em MAC Interface, Package, Cable Diagnostics, MSL Level, Product Type.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
DP83869HMRGZR
✅ Drop-In✓ Em estoque
$3.95 / unidade
Ver ficha técnica →DP83867CSRGZT
✅ Drop-In✓ Em estoque
$8.4 / unidade
Ver ficha técnica →DP83867IRPAPT
✅ Drop-In✓ Em estoque
$5.4 / unidade
Ver ficha técnica →AR8031-AL1B-R
✅ Drop-In✓ Em estoque
$2.05 / unidade
Ver ficha técnica →DP83869HMRGZT Especificações
| Product Type | Ethernet PHY Transceiver (Copper + Fiber) |
| Ethernet Standards Supported | 10BASE-Te, 100BASE-TX, 1000BASE-T, 100BASE-FX, 1000BASE-X |
| Number of Channels | 1 (1/1 Transceiver) |
| MAC Interface | RGMII, SGMII |
| Tensão de alimentação | 1.8 V / 2.5 V / 3.3 V |
| Data Rate (Max) | 1 Gbps (1000BASE-T) |
| Encapsulamento | 48-VQFN (RGZ) 7x7 mm with EP |
| Tipo de montagem | Surface Mount |
| Temperatura de operação | -40 C to +125 C (extended industrial) |
| ESD Protection (MDI) | >8 kV IEC 61000-4-2 direct contact |
| Energy Efficient Ethernet | IEEE 802.3az supported |
| Management Interface | MDIO (IEEE 802.3 clause 22/45) |
| Cable Diagnostics | TDR-based fault location |
| Nível MSL | MSL2-260C-1 YEAR (per partgenie) |
| Status RoHS | RoHS Compliant |
Configuração de pinos do DP83869HMRGZT
| Pino 1 | VDDIO — Digital I/O supply (1.8/2.5/3.3 V) |
| Pino 2 | VDD1P0 — Core 1.0 V LDO output (cap to GND) |
| Pino 3 | RESETn — Hardware reset, active low |
| Pino 4 | GPIO0 — General purpose / strap |
| Pino 5 | GPIO1 — General purpose / strap |
| Pino 6 | GPIO2 — General purpose / strap |
| Pino 7 | JTAG_TDI — JTAG test data in |
| Pino 8 | JTAG_TDO — JTAG test data out |
| Pino 9 | JTAG_TMS — JTAG test mode select |
| Pino 10 | JTAG_TCK — JTAG test clock |
| Pino 11 | INTRn — Interrupt output, active low |
| Pino 12 | CLK_OUT — Reference clock output |
| Pino 13 | MDC — Management data clock |
| Pino 14 | MDIO — Management data I/O |
| Pino 15 | RX_D0 — RGMII receive data bit 0 |
| Pino 16 | RX_D1 — RGMII receive data bit 1 |
| Pino 17 | RX_D2 — RGMII receive data bit 2 |
| Pino 18 | RX_D3 — RGMII receive data bit 3 |
| Pino 19 | RX_CLK — RGMII receive clock |
| Pino 20 | RX_CTRL — RGMII receive control |
| Pino 21 | TX_D0 — RGMII transmit data bit 0 |
| Pino 22 | TX_D1 — RGMII transmit data bit 1 |
| Pino 23 | TX_D2 — RGMII transmit data bit 2 |
| Pino 24 | TX_D3 — RGMII transmit data bit 3 |
| Pino 25 | TX_CLK — RGMII transmit clock |
| Pino 26 | TX_CTRL — RGMII transmit control |
| Pino 27 | SGMII_SDIN — SGMII serial data in (alternate mode) |
| Pino 28 | SGMII_SDOUT — SGMII serial data out (alternate mode) |
| Pino 29 | LED0 — Link/activity LED driver 0 |
| Pino 30 | LED1 — Link/activity LED driver 1 |
| Pino 31 | LED2 — Link/activity LED driver 2 |
| Pino 32 | MDI_P0P — MDI pair 0 positive (10/100/1000) |
| Pino 33 | MDI_P0N — MDI pair 0 negative (10/100/1000) |
| Pino 34 | MDI_P1P — MDI pair 1 positive (10/100/1000) |
| Pino 35 | MDI_P1N — MDI pair 1 negative (10/100/1000) |
| Pino 36 | MDI_P2P — MDI pair 2 positive (10/100/1000) |
| Pino 37 | MDI_P2N — MDI pair 2 negative (10/100/1000) |
| Pino 38 | MDI_P3P — MDI pair 3 positive (10/100/1000) |
| Pino 39 | MDI_P3N — MDI pair 3 negative (10/100/1000) |
| Pino 40 | SFP_SDn — SFP/fiber module signal detect |
| Pino 41 | SFP_TX_DIS — SFP/fiber transmit disable |
| Pino 42 | SFP_TX_FAULT — SFP/fiber transmit fault |
| Pino 43 | NC — Not connected (per datasheet) |
| Pino 44 | NC — Not connected (per datasheet) |
| Pino 45 | VDDA — Analog supply |
| Pino 46 | VSS — Ground |
| Pino 47 | VDD — Core supply |
| Pino 48 | VSS — Ground |
Aplicações típicas
DP83869HMRGZT é adequado para 6 aplicaçãos: Industrial Ethernet Switches, PLC and Factory Automation Communications, Grid Infrastructure / Substation Gateways, Ruggedized Surveillance Recorders, Industrial Protocol Bridges, Automotive Ethernet Test Equipment.
Industrial Ethernet Switches
The DP83869HMRGZT's copper/fiber dual media and -40 C to +125 C operating range make it well suited for managed industrial Ethernet switch port PHYs. Its 1 Gbps RGMII/SGMII MAC interface matches the throughput of typical switch ASICs, while the >8 kV IEC 61000-4-2 MDI ESD rating eliminates external TVS arrays on each RJ45 port. Compared with consumer PHYs, it tolerates conducted RF and surge events per EN 61000-4-4/6, which is essential for factory-floor installations.
Recomendado
PLC and Factory Automation Communications
In Programmable Logic Controller (PLC) backplanes and EtherCAT/PROFINET slave modules, the DP83869HMRGZT's Time-Sensitive Networking (TSN) readiness and IEEE 1588 timestamping support deterministic real-time control. The integrated PHY eliminates the need for a separate fiber transceiver on a PROFINET fiber ring, while 1.8/2.5/3.3 V supply flexibility allows direct connection to low-voltage SoC MACs. Use the SGMII mode when board area is constrained and the MAC SoC provides SERDES pins.
Recomendado
Grid Infrastructure / Substation Gateways
IEC 61850-3 substation gateways require PHYs that survive high surge and EMI stress over years of continuous duty. The DP83869HMRGZT's >8 kV IEC 61000-4-2 direct-contact ESD and extended -40 C to +125 C industrial temperature range, paired with 1000BASE-X fiber uplink capability, allow a single PHY to connect both substation IED copper drops and long-haul fiber backbones. The TDR-based cable diagnostic aids commissioning by locating cable faults before substation energization.
Recomendado
Ruggedized Surveillance Recorders
Outdoor IP-camera Network Video Recorder (NVR) chassis often require gigabit uplinks with both copper PoE+ pass-through and fiber backbone ports. The DP83869HMRGZT supports SGMII back to an NVR SoC, handles both RJ45 copper ports and SFP fiber cages, and tolerates wider operating temperatures than typical office PHYs. The TDR cable diagnostic simplifies field installation troubleshooting of long outdoor cable runs.
Recomendado
Industrial Protocol Bridges
EtherCAT-to-Ethernet, PROFINET-to-Ethernet, and Modbus TCP-to-Protocol-X bridges benefit from the DP83869HMRGZT's TSN/EEE support and dual media interface. One device can serve as the field-side copper PHY and the uplink fiber PHY, reducing board area and BOM count. Its cable diagnostic TDR also helps isolate field-cable faults that cause intermittent protocol timeouts on the plant floor.
Recomendado
Automotive Ethernet Test Equipment
Bench testers for 100BASE-T1 / 1000BASE-T1 automotive Ethernet often leverage the DP83869HMRGZT as a 1000BASE-T reference PHY alongside the automotive PHY under test, providing a known-good copper link partner. Its wide operating temperature range supports chassis environments without active cooling. The MDIO interface allows scripted register access for IEEE 802.3 conformance margin testing using the TI USB-2-MDIO tool.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para DP83869HMRGZT — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | DP83869HMRGZR | DP83867CSRGZT | DP83867IRPAPT | AR8031-AL1B-R |
|---|---|---|---|---|---|
| Package | 48-VQFN (RGZ) 7x7 mm | 48-VQFN (RGZ) 7x7 mm - same | VQFN - same family | HTQFP-64 - same family | QFN - verify exact size |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Qualcomm |
| Max Data Rate | 1 Gbps | 1 Gbps | 1 Gbps | 1 Gbps | 1 Gbps |
| Media Support | Copper + Fiber | Copper + Fiber | Copper only | Copper only | Copper (verify fiber) |
| MAC Interface | RGMII, SGMII | RGMII, SGMII | RGMII | RGMII | RGMII/SGMII (verify) |
Principais diferenciais
- Copper + fiber dual media in one PHY (vs DP83867IRPAPT)
- >8 kV IEC 61000-4-2 direct-contact ESD (vs DP83867CSRGZT)
- Extended -40 C to +125 C industrial temperature (vs DP83867CSRGZT)
Notas de projeto
RGMII timing skew between MAC and PHY is the most common source of intermittent 1 Gbps CRC errors. The DP83869HMRGZT exposes TX/RX clock-to-data delay control registers (per the TI datasheet skew-config section). Mis-tuned skew will appear as RX_ER errors and packet loss; tune the RGMII_ID_MODE strap and the RX_DV/TXD skew bits per the TI USB-2-MDIO script defaults for your MAC partner before locking the PCB layout. Estimated: typical in-spec board routing keeps skew under 50 ps per inch of matched trace length.
Do not assume the DP83867E is a drop-in replacement for the DP83869HMRGZT - per a TI E2E forum discussion, MDIO and several other pins are routed differently between the two devices. If you are migrating from DP83867ERGZ designs, plan a PCB revision, not a rework. Verify your MDIO, RESET, JTAG, and strap-pin assignments against the DP83869 datasheet's pinout table before committing to the BOM.
Place the MDI differential pairs (pins 32-39) with 100-ohm differential impedance, length-matched within 5 mils, and isolated from the RGMII/SGMII digital bus by at least a 4-mm keep-out. The DP83869HMRGZT integrates the MDI termination resistors; do not add external 100-ohm terminations on the line side. Provide a generous copper pour stitched with vias around the exposed pad (pin EP) to meet the -40 C to +125 C thermal envelope at full GigE power.
Although the DP83869HMRGZT's >8 kV IEC 61000-4-2 MDI ESD rating eliminates external TVS arrays in most installations, an optional common-mode choke plus a 100 nF/50 V coupling capacitor on each MDI pair improves margin against conducted RF interference per EN 61000-4-6. Estimated: at 10 MHz-80 MHz common-mode injection, the integrated PHY's filtering reduces conducted emissions by roughly 6-10 dB with the optional CMC.
Informações de conformidade
RoHS compliant per partgenie.ai compliance notes. MSL Level 2, 260 C, 1 YEAR per partgenie. Not AEC-Q100 qualified (industrial PHY family, not automotive). MDI ESD rated >8 kV IEC 61000-4-2 direct contact per TI datasheet (Rev. E).
