Intel

EPF8820AGC192-2 - FLEX 8000 FPGA, 8K Gates, 192-Pin CPGA | Intel

N.º da peça: EPF8820AGC192-2 ✗ Fim de vida

Em estoque Enviado em 1 a 3 dias úteis

5 V Vdss 192-pin CPGA (Ceramic Pin Grid Array) Package 125 MHz Speed

A partir de $55 USD / unidade

MOQ: 1 |

Preço atualizado: 2026-09-11

Preços por volume

Qtd.	Preço unitário	Total
1	$95	$95,00
10	$82	$820,00
100	$71	$7.100,00
500	$62.5	$31.250,00
1.000	$55	$55.000,00

ℹ️ Todos os preços estão em USD

Ver datasheet (PDF) Ver alternativas

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EPF8820AGC192-2 Visão geral

The Intel EPF8820AGC192-2 is a member of the FLEX 8000 programmable logic device family, delivering 8K usable gates, 672 logic cells, and a maximum internal clock frequency of 125 MHz in a 192-pin Ceramic Pin Grid Array (CPGA) package. Fabricated on a 0.42 µm CMOS process and powered from a 5 V supply, the EPF8820AGC192-2 delivers up to 16,000 usable gates and 1,500 registers with in-circuit reconfigurability (ICR) via external configuration devices or intelligent controllers.

An FPGA (Field Programmable Gate Array) is a type of integrated circuit containing an array of configurable logic blocks (CLBs), programmable interconnect, and I/O cells that can be electrically reconfigured by the designer after manufacture. FPGAs sit within the broader hierarchy: programmable logic device (PLD) -> FPGA -> programmable logic -> digital semiconductor. The FLEX 8000 family, introduced in the mid-1990s, was one of the early register-rich, SRAM-based CMOS PLD families aimed at glue-logic, bus-interface, and state-machine consolidation in 5 V systems.

Key features include a maximum clock frequency of 125 MHz, propagation delay of 5.0 ns (per third-party catalog data), 3.3 V or 5 V tolerant I/O operation, and configurable I/O standards. The device supports multiple I/O voltage references, allowing direct interfacing with 3.3 V and 5 V buses. In-circuit reconfigurability lets the design be updated in-system without removing the part, which was a defining advantage of the FLEX 8000 family over one-time-programmable PLDs.

Architecturally, the EPF8820AGC192-2 uses a SRAM-based lookup-table fabric backed by registers, with FastTrack interconnect providing predictable routing delays. The 192-pin CPGA ceramic package is intended for through-hole industrial and military sockets where mechanical robustness and thermal performance outweigh the board area required by plastic QFP alternatives.

Typical applications include industrial bus controllers, legacy 5 V system glue logic, telecom backplane interface logic, prototyping platforms, and retrocomputing or avionics systems where FLEX 8000 designs are preserved as firmware-equivalent IP. The 5 V tolerant I/O simplifies integration with TTL and CMOS legacy buses.

When designing with this part, ensure the configuration EPROM is correctly selected and that ICR is disabled during reset to prevent spurious configuration loading. The CPGA package requires a through-hole socket; verify socket footprint and pin-1 orientation before layout.

This page synthesizes distributor pricing, parametric compatibility data, and practical design considerations not aggregated on any single manufacturer or distributor page, complementing the original FLEX 8000 datasheet.

Alternativas drop-in para EPF8820AGC192-2 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.

Variantes desta série

Modelos da mesma série compatíveis como drop-in com EPF8820AGC192-2 (mesmo formato e footprint) — diferindo em Process Technology, Configuration Method, Package, Operating Temperature, Usable Gates.

EPF81500ARC240-3

Intel

Configuration Method: SRAM, serial or parallel EPROM, JTAG

Package: 240-BFQFP Exposed Pad (240-RQFP)

Usable Gates: 16,000