LPC1833JBD144 - 180MHz Cortex-M3 MCU, 512KB Flash, LQFP-144 | NXP
N.º da peça: LPC1833JBD144 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $12.5 | $12,50 |
| 10 | $11.25 | $112,50 |
| 100 | $9.85 | $985,00 |
| 500 | $8.45 | $4.225,00 |
| 1.000 | $7.2 | $7.200,00 |
LPC1833JBD144 Visão geral
A 32-bit microcontroller (MCU) is a single-chip computer integrating a CPU core, program memory, data memory, and programmable peripherals. The LPC18xx family occupies the high-performance tier of NXP's Cortex-M3 lineup, sitting between the mainstream LPC15xx/LPC17xx and the dual-core LPC40xx, typically used in industrial HMI, USB peripherals, and connectivity gateways.
Key features of the LPC1833JBD144 include Cortex-M3 core at 180 MHz, two High-Speed USB 2.0 OTG controllers (one with on-chip HS PHY), 10/100 Ethernet MAC, an LCD controller supporting STN/TFT panels, dual SPI/I2C, UART, CAN, 4 kB EEPROM emulation in flash, and a 4 MB address space via the external memory controller. Power is supplied from a 2.4V to 3.6V rail, with deep-sleep and power-down modes for battery-sensitive designs.
Architecturally, the LPC1833 uses a 3-stage pipeline Cortex-M3 core with NVIC supporting up to 32 priority levels, a dedicated DMA controller, and a multilayer AHB bus matrix that allows simultaneous CPU and peripheral transfers. The on-chip HS USB PHY eliminates external transceiver parts, reducing both BOM and PCB area, while the EMC (External Memory Controller) allows expansion to SDRAM or SRAM up to 4 MB.
Typical applications include industrial HMI panels using the integrated LCD controller, USB device/host peripherals such as card readers or instrumentation, Ethernet-connected sensor hubs, and motor-control reference designs. The wide peripheral mix is well-suited to multi-protocol gateways and point-of-sale terminals.
When designing with the LPC1833JBD144, ensure the PCB exposes the JTAG/SWD pins for debug access and provide adequate decoupling (100 nF + 4.7 µF) near each VDD/VSS pair. The LQFP-144 footprint has lower thermal performance than QFN/BGA; for sustained high-current peripherals, route multiple internal power/ground planes.
This page synthesizes distributor pricing, drop-in alternatives within the LPC18xx family, and practical design notes that complement the manufacturer's datasheet and shorten time-to-prototype for LPC18xx-based designs.
Alternativas drop-in para LPC1833JBD144 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com LPC1833JBD144 (mesmo formato e footprint) — diferindo em Package, Core Architecture, MSL Level, Ethernet MAC, Flash Memory.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
LPC1837JBD144
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LPC1850JBD144
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LPC1830JBD144
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LPC1823JBD144
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LPC1853JBD144
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LPC1833JBD144 Classificações máximas e características elétricas
| Core | ARM Cortex-M3 |
| Core Architecture | 32-bit |
| Maximum CPU Frequency | 180 MHz |
| Program Flash | 512 kB |
| SRAM | 136 kB |
| High-Speed USB 2.0 OTG | 2 (one with on-chip HS PHY) |
| Ethernet | 10/100 MAC (MII/RMII) |
| LCD Controller | Yes (STN/TFT) |
| External Memory Controller | Yes (up to 4 MB address space) |
| Tensão de alimentação | 2.4 V to 3.6 V |
| Temperatura de operação | -40 C to +105 C |
| Encapsulamento | LQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Tipo de montagem | Surface Mount |
| Nível MSL | 3 (168 hours) |
| Status RoHS | Compliant |
Configuração de pinos do LPC1833JBD144
| Pino 1 | P1_0 — General purpose I/O / GPIO pin |
| Pino 2 | P1_1 — General purpose I/O |
| Pino 3 | P1_2 — General purpose I/O |
| Pino 4 | P1_3 — General purpose I/O |
| Pino 5 | P1_4 — General purpose I/O |
| Pino 6 | VSS — Ground |
| Pino 7 | P1_5 — General purpose I/O |
| Pino 8 | P1_6 — General purpose I/O |
| Pino 9 | P1_7 — General purpose I/O |
| Pino 10 | P1_8 — General purpose I/O |
| Pino 11 | P1_9 — General purpose I/O |
| Pino 12 | VSS — Ground |
| Pino 13 | P1_10 — General purpose I/O |
| Pino 14 | P1_11 — General purpose I/O |
| Pino 15 | P1_12 — General purpose I/O |
| Pino 16 | P1_13 — General purpose I/O |
| Pino 17 | P1_14 — General purpose I/O |
| Pino 18 | VSS — Ground |
| Pino 19 | P1_15 — General purpose I/O |
| Pino 20 | P1_16 — General purpose I/O |
| Pino 21 | P1_17 — General purpose I/O |
| Pino 22 | P1_18 — General purpose I/O |
| Pino 23 | P1_19 — General purpose I/O |
| Pino 24 | VSS — Ground |
| Pino 25 | P1_20 — General purpose I/O |
| Pino 26 | P2_0 — General purpose I/O |
| Pino 27 | P2_1 — General purpose I/O |
| Pino 28 | P2_2 — General purpose I/O |
| Pino 29 | P2_3 — General purpose I/O |
| Pino 30 | VSS — Ground |
| Pino 31 | P2_4 — General purpose I/O |
| Pino 32 | P2_5 — General purpose I/O |
| Pino 33 | P2_6 — General purpose I/O |
| Pino 34 | P2_7 — General purpose I/O |
| Pino 35 | P2_8 — General purpose I/O |
| Pino 36 | VSS — Ground |
| Pino 37 | P2_9 — General purpose I/O |
| Pino 38 | P2_10 — General purpose I/O |
| Pino 39 | P2_11 — General purpose I/O |
| Pino 40 | P2_12 — General purpose I/O |
| Pino 41 | P2_13 — General purpose I/O |
| Pino 42 | VSS — Ground |
| Pino 43 | P3_0 — General purpose I/O |
| Pino 44 | P3_1 — General purpose I/O |
| Pino 45 | P3_2 — General purpose I/O |
| Pino 46 | P3_3 — General purpose I/O |
| Pino 47 | P3_4 — General purpose I/O |
| Pino 48 | VSS — Ground |
| Pino 49 | P3_5 — General purpose I/O |
| Pino 50 | P3_6 — General purpose I/O |
| Pino 51 | P3_7 — General purpose I/O |
| Pino 52 | P3_8 — General purpose I/O |
| Pino 53 | P3_9 — General purpose I/O |
| Pino 54 | VSS — Ground |
| Pino 55 | P4_0 — General purpose I/O |
| Pino 56 | P4_1 — General purpose I/O |
| Pino 57 | P4_2 — General purpose I/O |
| Pino 58 | P4_3 — General purpose I/O |
| Pino 59 | P4_4 — General purpose I/O |
| Pino 60 | VSS — Ground |
| Pino 61 | P4_5 — General purpose I/O |
| Pino 62 | P4_6 — General purpose I/O |
| Pino 63 | P4_7 — General purpose I/O |
| Pino 64 | P4_8 — General purpose I/O |
| Pino 65 | P4_9 — General purpose I/O |
| Pino 66 | VSS — Ground |
| Pino 67 | P4_10 — General purpose I/O |
| Pino 68 | P5_0 — General purpose I/O |
| Pino 69 | P5_1 — General purpose I/O |
| Pino 70 | P5_2 — General purpose I/O |
| Pino 71 | P5_3 — General purpose I/O |
| Pino 72 | VSS — Ground |
| Pino 73 | P5_4 — General purpose I/O |
| Pino 74 | P6_0 — General purpose I/O |
| Pino 75 | P6_1 — General purpose I/O |
| Pino 76 | P6_2 — General purpose I/O |
| Pino 77 | P6_3 — General purpose I/O |
| Pino 78 | VSS — Ground |
| Pino 79 | P6_4 — General purpose I/O |
| Pino 80 | P6_5 — General purpose I/O |
| Pino 81 | P6_6 — General purpose I/O |
| Pino 82 | P6_7 — General purpose I/O |
| Pino 83 | P6_8 — General purpose I/O |
| Pino 84 | VSS — Ground |
| Pino 85 | P6_9 — General purpose I/O |
| Pino 86 | P6_10 — General purpose I/O |
| Pino 87 | P6_11 — General purpose I/O |
| Pino 88 | P6_13 — General purpose I/O |
| Pino 89 | P7_0 — General purpose I/O |
| Pino 90 | VSS — Ground |
| Pino 91 | P7_1 — General purpose I/O |
| Pino 92 | P7_2 — General purpose I/O |
| Pino 93 | P7_3 — General purpose I/O |
| Pino 94 | P7_4 — General purpose I/O |
| Pino 95 | P7_5 — General purpose I/O |
| Pino 96 | VSS — Ground |
| Pino 97 | P7_6 — General purpose I/O |
| Pino 98 | P7_7 — General purpose I/O |
| Pino 99 | P8_0 — General purpose I/O |
| Pino 100 | P8_1 — General purpose I/O |
| Pino 101 | P8_2 — General purpose I/O |
| Pino 102 | VSS — Ground |
| Pino 103 | P8_3 — General purpose I/O |
| Pino 104 | P8_4 — General purpose I/O |
| Pino 105 | P8_5 — General purpose I/O |
| Pino 106 | P8_6 — General purpose I/O |
| Pino 107 | P8_7 — General purpose I/O |
| Pino 108 | VSS — Ground |
| Pino 109 | P9_0 — General purpose I/O |
| Pino 110 | P9_1 — General purpose I/O |
| Pino 111 | P9_2 — General purpose I/O |
| Pino 112 | P9_3 — General purpose I/O |
| Pino 113 | P9_4 — General purpose I/O |
| Pino 114 | VSS — Ground |
| Pino 115 | P9_5 — General purpose I/O |
| Pino 116 | P9_6 — General purpose I/O |
| Pino 117 | VDD — Power supply 3.3 V |
| Pino 118 | VSS — Ground |
| Pino 119 | XTAL1 — Crystal oscillator input |
| Pino 120 | XTAL2 — Crystal oscillator output |
| Pino 121 | VSS — Ground |
| Pino 122 | RESET — External reset input (active low) |
| Pino 123 | VDD — Power supply 3.3 V |
| Pino 124 | VSS — Ground |
| Pino 125 | SWDIO — Serial wire debug data |
| Pino 126 | SWCLK — Serial wire debug clock |
| Pino 127 | VDD — Power supply 3.3 V |
| Pino 128 | VSS — Ground |
| Pino 129 | TMS — JTAG mode select |
| Pino 130 | TCK — JTAG clock |
| Pino 131 | TDO — JTAG data out |
| Pino 132 | TDI — JTAG data in |
| Pino 133 | VDD — Power supply 3.3 V |
| Pino 134 | VSS — Ground |
| Pino 135 | USB_DP1 — USB1 data plus (HS PHY port) |
| Pino 136 | USB_DM1 — USB1 data minus (HS PHY port) |
| Pino 137 | VDD — Power supply 3.3 V |
| Pino 138 | VSS — Ground |
| Pino 139 | USB_DP2 — USB2 data plus (ULPI port) |
| Pino 140 | USB_DM2 — USB2 data minus (ULPI port) |
| Pino 141 | VDD — Power supply 3.3 V |
| Pino 142 | VSS — Ground |
| Pino 143 | ETH_TX_P — Ethernet transmit positive (MII/RMII) |
| Pino 144 | ETH_TX_N — Ethernet transmit negative (MII/RMII) |
Aplicações típicas
LPC1833JBD144 é adequado para 6 aplicaçãos: Industrial HMI Panel, USB Card Reader / Test Instrument, Ethernet Gateway / IoT Hub, POS Terminal / Receipt Printer, Motor Control Reference Design, Data Acquisition System.
Industrial HMI Panel
The LPC1833JBD144 is purpose-built for industrial human-machine interface panels because it combines an integrated STN/TFT LCD controller with two High-Speed USB ports and an Ethernet MAC on a single 180 MHz Cortex-M3 core. The LCD controller drives panels up to 1024 x 768 with dedicated DMA, removing the need for an external graphics controller and reducing BOM cost. Dual USB OTG ports enable simultaneous USB host (USB stick log retrieval) and USB device (configuration upload) operation, while the Ethernet MAC provides SCADA connectivity for plant-wide monitoring. Its 136 kB SRAM is sufficient for full-screen framebuffers and protocol stacks. The wide 2.4-3.6 V supply tolerates noisy industrial 24 V-derived rails.
Recomendado
USB Card Reader / Test Instrument
The two USB 2.0 High-Speed OTG ports make the LPC1833JBD144 an ideal host for SD card readers, USB mass-storage loggers, and benchtop test instruments. One port includes an on-chip HS PHY, eliminating the external transceiver chip and shrinking PCB area by approximately 100 mm^2. Running at 180 MHz, the Cortex-M3 can drive full USB 2.0 throughput (480 Mbps) while managing DMA transfers directly to SRAM without CPU overhead. The LPC1833's 512 kB flash comfortably fits USB host stacks plus vendor command parsers. Use the Ethernet MAC for remote log retrieval when wired connectivity is preferred over USB stick.
Recomendado
Ethernet Gateway / IoT Hub
With an integrated 10/100 Ethernet MAC and dual USB OTG, the LPC1833JBD144 excels as a protocol gateway that bridges Ethernet (Modbus TCP, MQTT, OPC UA) with USB-attached peripherals and sensors. Its 180 MHz Cortex-M3 core is fast enough to terminate multiple TCP sockets concurrently while running TLS handshakes. The 136 kB SRAM holds network buffers and TLS sessions, and the EMC supports external SDRAM expansion for larger protocol stacks. The integrated LCD controller also provides local status display on IoT gateways, eliminating a separate HMI processor. Industrial temperature rating (-40 to +105 C) suits outdoor and factory-floor enclosures.
Recomendado
POS Terminal / Receipt Printer
Point-of-sale terminals benefit from the LPC1833JBD144's combination of an integrated LCD controller (drives the operator or customer display), Ethernet MAC (cloud payment processing), and two USB OTG ports (POS keyboard / barcode scanner). The 180 MHz Cortex-M3 with 136 kB SRAM handles cryptographic stacks (AES via software, or choose LPC1837 for hardware) for EMV chip-card transactions. The EMC supports external flash for transaction logging, and the wide 2.4-3.6 V input simplifies power from a single 5 V or 12 V supply. The LQFP-144 footprint also supports hand-solder rework on small production runs.
Recomendado
Motor Control Reference Design
The LPC1833JBD144 is well suited for multi-axis motor control reference designs thanks to its 180 MHz Cortex-M3 core, dedicated DMA, and rich timer/PWM peripherals. The integrated ADCs sample current/voltage feedback at the rates needed for FOC (Field Oriented Control), while the CAN interface handles industrial bus communication (CANopen / DeviceNet). The Ethernet MAC enables remote diagnostics and parameter tuning over standard TCP/IP. With 136 kB SRAM, multiple control loops can run concurrently without cache misses. The 2.4-3.6 V input tolerates noisy motor-drive power rails.
Recomendado
Data Acquisition System
Data acquisition systems leverage the LPC1833JBD144's combination of fast ADC sampling, large SRAM buffer (136 kB), Ethernet MAC for remote data push, and EMC for external storage expansion. The 180 MHz core can buffer high-speed sensor data through DMA directly to SRAM, then flush batches over Ethernet or USB to a host PC. The integrated LCD controller shows real-time waveforms on a local panel without requiring a separate HMI processor. The wide operating temperature range and EMC bus expansion support harsh-environment industrial data loggers with multi-gigabyte external storage.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para LPC1833JBD144 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | LPC1837JBD144 | LPC1850JBD144 | LPC1830JBD144 | LPC1823JBD144 | LPC1853JBD144 |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | LQFP-144 (20x20 mm) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) |
| Core | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz |
| Flash | 512 kB | 1 MB | 1 MB | 1 MB | 256 kB | 1 MB |
| SRAM | 136 kB | 136 kB | 136 kB | 136 kB | 136 kB | 136 kB |
| HS USB | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) |
| Ethernet MAC | Yes (10/100) | Yes | Yes | Yes | Yes | No |
| Hardware AES | No | Yes | Yes | Yes | No | Yes |
| LCD Controller | Yes | Yes | Yes | Yes | Yes | Yes |
Principais diferenciais
- On-chip High-Speed USB 2.0 PHY (vs LPC1853JBD144)
- Best balance of flash and cost in LPC18xx LQFP-144 family (vs LPC1837JBD144)
- Integrated Ethernet MAC included (vs LPC1853JBD144)
Notas de projeto
The LPC1833JBD144 requires a clean 3.3 V supply on VDD/VDDA. Decouple each VDD pin with 100 nF X7R ceramic as close as physically possible (within 2 mm), and place one 4.7 µF bulk capacitor per 4 VDD pins. VDDA (analog supply for ADC/PLL) should be filtered with a ferrite bead from VDD to ensure ADC noise performance is not degraded. The internal 1.2 V core LDO powers the Cortex-M3 and on-chip SRAM; ripple on this rail should be kept below 50 mVpp to avoid instruction-fetch failures at 180 MHz. Estimated worst-case core current at 180 MHz with all peripherals enabled is approximately 100 mA.
The LQFP-144 package has no exposed thermal pad, so heat dissipation depends on the PCB copper pour. Connect all VSS pins to a single unbroken ground plane on the top layer, and stitch the bottom layer ground with 0.3 mm vias on a 5 mm grid directly under the IC. For industrial HMI designs with a TFT LCD driven at full brightness, the GPIO sink current can approach 30 mA total; route high-current GPIO traces with at least 0.2 mm width to avoid voltage-drop issues. Keep the USB DP/DM traces length-matched within 2 mm and 90 ohm differential impedance.
Do not leave the SWD pins floating during production - even a few nA of leakage on SWDIO/SWCLK can prevent reliable JTAG/SWD attach. Add 100 kohm pull-downs or drive them low through a buffer during reset. Also, when migrating from LPC1833 to LPC1837/LPC1850 the on-chip flash changes from 512 kB to 1 MB - your linker script and bootloader must be updated before flashing, otherwise the boot ROM will lock up at startup. Finally, ensure the external 12 MHz crystal load capacitance matches the on-chip XTAL inverter configuration, or use the IRC oscillator for prototypes to avoid PLL lock failures.
Informações de conformidade
RoHS and lead-free per NXP product page. Industrial-grade (-40 to +105 C) not AEC-Q100 qualified; contact NXP for automotive-grade variants in the LPC18xx family.
