LPC1833JBD144 - 180MHz Cortex-M3 MCU, 512KB Flash, LQFP-144 | NXP
Référence : LPC1833JBD144 ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $12.5 | $12,50 |
| 10 | $11.25 | $112,50 |
| 100 | $9.85 | $985,00 |
| 500 | $8.45 | $4 225,00 |
| 1 000 | $7.2 | $7 200,00 |
LPC1833JBD144 Présentation
A 32-bit microcontroller (MCU) is a single-chip computer integrating a CPU core, program memory, data memory, and programmable peripherals. The LPC18xx family occupies the high-performance tier of NXP's Cortex-M3 lineup, sitting between the mainstream LPC15xx/LPC17xx and the dual-core LPC40xx, typically used in industrial HMI, USB peripherals, and connectivity gateways.
Key features of the LPC1833JBD144 include Cortex-M3 core at 180 MHz, two High-Speed USB 2.0 OTG controllers (one with on-chip HS PHY), 10/100 Ethernet MAC, an LCD controller supporting STN/TFT panels, dual SPI/I2C, UART, CAN, 4 kB EEPROM emulation in flash, and a 4 MB address space via the external memory controller. Power is supplied from a 2.4V to 3.6V rail, with deep-sleep and power-down modes for battery-sensitive designs.
Architecturally, the LPC1833 uses a 3-stage pipeline Cortex-M3 core with NVIC supporting up to 32 priority levels, a dedicated DMA controller, and a multilayer AHB bus matrix that allows simultaneous CPU and peripheral transfers. The on-chip HS USB PHY eliminates external transceiver parts, reducing both BOM and PCB area, while the EMC (External Memory Controller) allows expansion to SDRAM or SRAM up to 4 MB.
Typical applications include industrial HMI panels using the integrated LCD controller, USB device/host peripherals such as card readers or instrumentation, Ethernet-connected sensor hubs, and motor-control reference designs. The wide peripheral mix is well-suited to multi-protocol gateways and point-of-sale terminals.
When designing with the LPC1833JBD144, ensure the PCB exposes the JTAG/SWD pins for debug access and provide adequate decoupling (100 nF + 4.7 µF) near each VDD/VSS pair. The LQFP-144 footprint has lower thermal performance than QFN/BGA; for sustained high-current peripherals, route multiple internal power/ground planes.
This page synthesizes distributor pricing, drop-in alternatives within the LPC18xx family, and practical design notes that complement the manufacturer's datasheet and shorten time-to-prototype for LPC18xx-based designs.
Alternatives de remplacement direct pour LPC1833JBD144 — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec LPC1833JBD144 (même facteur de forme et même empreinte) — différant par Package, Core Architecture, MSL Level, Ethernet MAC, Flash Memory.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
LPC1837JBD144
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1850JBD144
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1830JBD144
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1823JBD144
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1853JBD144
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1833JBD144 Valeurs maximales et caractéristiques électriques
| Core | ARM Cortex-M3 |
| Core Architecture | 32-bit |
| Maximum CPU Frequency | 180 MHz |
| Program Flash | 512 kB |
| SRAM | 136 kB |
| High-Speed USB 2.0 OTG | 2 (one with on-chip HS PHY) |
| Ethernet | 10/100 MAC (MII/RMII) |
| LCD Controller | Yes (STN/TFT) |
| External Memory Controller | Yes (up to 4 MB address space) |
| Tension d'alimentation | 2.4 V to 3.6 V |
| Température de fonctionnement | -40 C to +105 C |
| Boîtier | LQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Type de montage | Surface Mount |
| Niveau MSL | 3 (168 hours) |
| Statut RoHS | Compliant |
Configuration des broches de LPC1833JBD144
| Broche 1 | P1_0 — General purpose I/O / GPIO pin |
| Broche 2 | P1_1 — General purpose I/O |
| Broche 3 | P1_2 — General purpose I/O |
| Broche 4 | P1_3 — General purpose I/O |
| Broche 5 | P1_4 — General purpose I/O |
| Broche 6 | VSS — Ground |
| Broche 7 | P1_5 — General purpose I/O |
| Broche 8 | P1_6 — General purpose I/O |
| Broche 9 | P1_7 — General purpose I/O |
| Broche 10 | P1_8 — General purpose I/O |
| Broche 11 | P1_9 — General purpose I/O |
| Broche 12 | VSS — Ground |
| Broche 13 | P1_10 — General purpose I/O |
| Broche 14 | P1_11 — General purpose I/O |
| Broche 15 | P1_12 — General purpose I/O |
| Broche 16 | P1_13 — General purpose I/O |
| Broche 17 | P1_14 — General purpose I/O |
| Broche 18 | VSS — Ground |
| Broche 19 | P1_15 — General purpose I/O |
| Broche 20 | P1_16 — General purpose I/O |
| Broche 21 | P1_17 — General purpose I/O |
| Broche 22 | P1_18 — General purpose I/O |
| Broche 23 | P1_19 — General purpose I/O |
| Broche 24 | VSS — Ground |
| Broche 25 | P1_20 — General purpose I/O |
| Broche 26 | P2_0 — General purpose I/O |
| Broche 27 | P2_1 — General purpose I/O |
| Broche 28 | P2_2 — General purpose I/O |
| Broche 29 | P2_3 — General purpose I/O |
| Broche 30 | VSS — Ground |
| Broche 31 | P2_4 — General purpose I/O |
| Broche 32 | P2_5 — General purpose I/O |
| Broche 33 | P2_6 — General purpose I/O |
| Broche 34 | P2_7 — General purpose I/O |
| Broche 35 | P2_8 — General purpose I/O |
| Broche 36 | VSS — Ground |
| Broche 37 | P2_9 — General purpose I/O |
| Broche 38 | P2_10 — General purpose I/O |
| Broche 39 | P2_11 — General purpose I/O |
| Broche 40 | P2_12 — General purpose I/O |
| Broche 41 | P2_13 — General purpose I/O |
| Broche 42 | VSS — Ground |
| Broche 43 | P3_0 — General purpose I/O |
| Broche 44 | P3_1 — General purpose I/O |
| Broche 45 | P3_2 — General purpose I/O |
| Broche 46 | P3_3 — General purpose I/O |
| Broche 47 | P3_4 — General purpose I/O |
| Broche 48 | VSS — Ground |
| Broche 49 | P3_5 — General purpose I/O |
| Broche 50 | P3_6 — General purpose I/O |
| Broche 51 | P3_7 — General purpose I/O |
| Broche 52 | P3_8 — General purpose I/O |
| Broche 53 | P3_9 — General purpose I/O |
| Broche 54 | VSS — Ground |
| Broche 55 | P4_0 — General purpose I/O |
| Broche 56 | P4_1 — General purpose I/O |
| Broche 57 | P4_2 — General purpose I/O |
| Broche 58 | P4_3 — General purpose I/O |
| Broche 59 | P4_4 — General purpose I/O |
| Broche 60 | VSS — Ground |
| Broche 61 | P4_5 — General purpose I/O |
| Broche 62 | P4_6 — General purpose I/O |
| Broche 63 | P4_7 — General purpose I/O |
| Broche 64 | P4_8 — General purpose I/O |
| Broche 65 | P4_9 — General purpose I/O |
| Broche 66 | VSS — Ground |
| Broche 67 | P4_10 — General purpose I/O |
| Broche 68 | P5_0 — General purpose I/O |
| Broche 69 | P5_1 — General purpose I/O |
| Broche 70 | P5_2 — General purpose I/O |
| Broche 71 | P5_3 — General purpose I/O |
| Broche 72 | VSS — Ground |
| Broche 73 | P5_4 — General purpose I/O |
| Broche 74 | P6_0 — General purpose I/O |
| Broche 75 | P6_1 — General purpose I/O |
| Broche 76 | P6_2 — General purpose I/O |
| Broche 77 | P6_3 — General purpose I/O |
| Broche 78 | VSS — Ground |
| Broche 79 | P6_4 — General purpose I/O |
| Broche 80 | P6_5 — General purpose I/O |
| Broche 81 | P6_6 — General purpose I/O |
| Broche 82 | P6_7 — General purpose I/O |
| Broche 83 | P6_8 — General purpose I/O |
| Broche 84 | VSS — Ground |
| Broche 85 | P6_9 — General purpose I/O |
| Broche 86 | P6_10 — General purpose I/O |
| Broche 87 | P6_11 — General purpose I/O |
| Broche 88 | P6_13 — General purpose I/O |
| Broche 89 | P7_0 — General purpose I/O |
| Broche 90 | VSS — Ground |
| Broche 91 | P7_1 — General purpose I/O |
| Broche 92 | P7_2 — General purpose I/O |
| Broche 93 | P7_3 — General purpose I/O |
| Broche 94 | P7_4 — General purpose I/O |
| Broche 95 | P7_5 — General purpose I/O |
| Broche 96 | VSS — Ground |
| Broche 97 | P7_6 — General purpose I/O |
| Broche 98 | P7_7 — General purpose I/O |
| Broche 99 | P8_0 — General purpose I/O |
| Broche 100 | P8_1 — General purpose I/O |
| Broche 101 | P8_2 — General purpose I/O |
| Broche 102 | VSS — Ground |
| Broche 103 | P8_3 — General purpose I/O |
| Broche 104 | P8_4 — General purpose I/O |
| Broche 105 | P8_5 — General purpose I/O |
| Broche 106 | P8_6 — General purpose I/O |
| Broche 107 | P8_7 — General purpose I/O |
| Broche 108 | VSS — Ground |
| Broche 109 | P9_0 — General purpose I/O |
| Broche 110 | P9_1 — General purpose I/O |
| Broche 111 | P9_2 — General purpose I/O |
| Broche 112 | P9_3 — General purpose I/O |
| Broche 113 | P9_4 — General purpose I/O |
| Broche 114 | VSS — Ground |
| Broche 115 | P9_5 — General purpose I/O |
| Broche 116 | P9_6 — General purpose I/O |
| Broche 117 | VDD — Power supply 3.3 V |
| Broche 118 | VSS — Ground |
| Broche 119 | XTAL1 — Crystal oscillator input |
| Broche 120 | XTAL2 — Crystal oscillator output |
| Broche 121 | VSS — Ground |
| Broche 122 | RESET — External reset input (active low) |
| Broche 123 | VDD — Power supply 3.3 V |
| Broche 124 | VSS — Ground |
| Broche 125 | SWDIO — Serial wire debug data |
| Broche 126 | SWCLK — Serial wire debug clock |
| Broche 127 | VDD — Power supply 3.3 V |
| Broche 128 | VSS — Ground |
| Broche 129 | TMS — JTAG mode select |
| Broche 130 | TCK — JTAG clock |
| Broche 131 | TDO — JTAG data out |
| Broche 132 | TDI — JTAG data in |
| Broche 133 | VDD — Power supply 3.3 V |
| Broche 134 | VSS — Ground |
| Broche 135 | USB_DP1 — USB1 data plus (HS PHY port) |
| Broche 136 | USB_DM1 — USB1 data minus (HS PHY port) |
| Broche 137 | VDD — Power supply 3.3 V |
| Broche 138 | VSS — Ground |
| Broche 139 | USB_DP2 — USB2 data plus (ULPI port) |
| Broche 140 | USB_DM2 — USB2 data minus (ULPI port) |
| Broche 141 | VDD — Power supply 3.3 V |
| Broche 142 | VSS — Ground |
| Broche 143 | ETH_TX_P — Ethernet transmit positive (MII/RMII) |
| Broche 144 | ETH_TX_N — Ethernet transmit negative (MII/RMII) |
Applications typiques
LPC1833JBD144 convient pour 6 applications: Industrial HMI Panel, USB Card Reader / Test Instrument, Ethernet Gateway / IoT Hub, POS Terminal / Receipt Printer, Motor Control Reference Design, Data Acquisition System.
Industrial HMI Panel
The LPC1833JBD144 is purpose-built for industrial human-machine interface panels because it combines an integrated STN/TFT LCD controller with two High-Speed USB ports and an Ethernet MAC on a single 180 MHz Cortex-M3 core. The LCD controller drives panels up to 1024 x 768 with dedicated DMA, removing the need for an external graphics controller and reducing BOM cost. Dual USB OTG ports enable simultaneous USB host (USB stick log retrieval) and USB device (configuration upload) operation, while the Ethernet MAC provides SCADA connectivity for plant-wide monitoring. Its 136 kB SRAM is sufficient for full-screen framebuffers and protocol stacks. The wide 2.4-3.6 V supply tolerates noisy industrial 24 V-derived rails.
Recommandé
USB Card Reader / Test Instrument
The two USB 2.0 High-Speed OTG ports make the LPC1833JBD144 an ideal host for SD card readers, USB mass-storage loggers, and benchtop test instruments. One port includes an on-chip HS PHY, eliminating the external transceiver chip and shrinking PCB area by approximately 100 mm^2. Running at 180 MHz, the Cortex-M3 can drive full USB 2.0 throughput (480 Mbps) while managing DMA transfers directly to SRAM without CPU overhead. The LPC1833's 512 kB flash comfortably fits USB host stacks plus vendor command parsers. Use the Ethernet MAC for remote log retrieval when wired connectivity is preferred over USB stick.
Recommandé
Ethernet Gateway / IoT Hub
With an integrated 10/100 Ethernet MAC and dual USB OTG, the LPC1833JBD144 excels as a protocol gateway that bridges Ethernet (Modbus TCP, MQTT, OPC UA) with USB-attached peripherals and sensors. Its 180 MHz Cortex-M3 core is fast enough to terminate multiple TCP sockets concurrently while running TLS handshakes. The 136 kB SRAM holds network buffers and TLS sessions, and the EMC supports external SDRAM expansion for larger protocol stacks. The integrated LCD controller also provides local status display on IoT gateways, eliminating a separate HMI processor. Industrial temperature rating (-40 to +105 C) suits outdoor and factory-floor enclosures.
Recommandé
POS Terminal / Receipt Printer
Point-of-sale terminals benefit from the LPC1833JBD144's combination of an integrated LCD controller (drives the operator or customer display), Ethernet MAC (cloud payment processing), and two USB OTG ports (POS keyboard / barcode scanner). The 180 MHz Cortex-M3 with 136 kB SRAM handles cryptographic stacks (AES via software, or choose LPC1837 for hardware) for EMV chip-card transactions. The EMC supports external flash for transaction logging, and the wide 2.4-3.6 V input simplifies power from a single 5 V or 12 V supply. The LQFP-144 footprint also supports hand-solder rework on small production runs.
Recommandé
Motor Control Reference Design
The LPC1833JBD144 is well suited for multi-axis motor control reference designs thanks to its 180 MHz Cortex-M3 core, dedicated DMA, and rich timer/PWM peripherals. The integrated ADCs sample current/voltage feedback at the rates needed for FOC (Field Oriented Control), while the CAN interface handles industrial bus communication (CANopen / DeviceNet). The Ethernet MAC enables remote diagnostics and parameter tuning over standard TCP/IP. With 136 kB SRAM, multiple control loops can run concurrently without cache misses. The 2.4-3.6 V input tolerates noisy motor-drive power rails.
Recommandé
Data Acquisition System
Data acquisition systems leverage the LPC1833JBD144's combination of fast ADC sampling, large SRAM buffer (136 kB), Ethernet MAC for remote data push, and EMC for external storage expansion. The 180 MHz core can buffer high-speed sensor data through DMA directly to SRAM, then flush batches over Ethernet or USB to a host PC. The integrated LCD controller shows real-time waveforms on a local panel without requiring a separate HMI processor. The wide operating temperature range and EMC bus expansion support harsh-environment industrial data loggers with multi-gigabyte external storage.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour LPC1833JBD144 — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | LPC1837JBD144 | LPC1850JBD144 | LPC1830JBD144 | LPC1823JBD144 | LPC1853JBD144 |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | LQFP-144 (20x20 mm) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) | LQFP-144 (same) |
| Core | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz | Cortex-M3 180 MHz |
| Flash | 512 kB | 1 MB | 1 MB | 1 MB | 256 kB | 1 MB |
| SRAM | 136 kB | 136 kB | 136 kB | 136 kB | 136 kB | 136 kB |
| HS USB | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) | 2 (1 on-chip PHY) |
| Ethernet MAC | Yes (10/100) | Yes | Yes | Yes | Yes | No |
| Hardware AES | No | Yes | Yes | Yes | No | Yes |
| LCD Controller | Yes | Yes | Yes | Yes | Yes | Yes |
Principaux différenciateurs
- On-chip High-Speed USB 2.0 PHY (vs LPC1853JBD144)
- Best balance of flash and cost in LPC18xx LQFP-144 family (vs LPC1837JBD144)
- Integrated Ethernet MAC included (vs LPC1853JBD144)
Notes de conception
The LPC1833JBD144 requires a clean 3.3 V supply on VDD/VDDA. Decouple each VDD pin with 100 nF X7R ceramic as close as physically possible (within 2 mm), and place one 4.7 µF bulk capacitor per 4 VDD pins. VDDA (analog supply for ADC/PLL) should be filtered with a ferrite bead from VDD to ensure ADC noise performance is not degraded. The internal 1.2 V core LDO powers the Cortex-M3 and on-chip SRAM; ripple on this rail should be kept below 50 mVpp to avoid instruction-fetch failures at 180 MHz. Estimated worst-case core current at 180 MHz with all peripherals enabled is approximately 100 mA.
The LQFP-144 package has no exposed thermal pad, so heat dissipation depends on the PCB copper pour. Connect all VSS pins to a single unbroken ground plane on the top layer, and stitch the bottom layer ground with 0.3 mm vias on a 5 mm grid directly under the IC. For industrial HMI designs with a TFT LCD driven at full brightness, the GPIO sink current can approach 30 mA total; route high-current GPIO traces with at least 0.2 mm width to avoid voltage-drop issues. Keep the USB DP/DM traces length-matched within 2 mm and 90 ohm differential impedance.
Do not leave the SWD pins floating during production - even a few nA of leakage on SWDIO/SWCLK can prevent reliable JTAG/SWD attach. Add 100 kohm pull-downs or drive them low through a buffer during reset. Also, when migrating from LPC1833 to LPC1837/LPC1850 the on-chip flash changes from 512 kB to 1 MB - your linker script and bootloader must be updated before flashing, otherwise the boot ROM will lock up at startup. Finally, ensure the external 12 MHz crystal load capacitance matches the on-chip XTAL inverter configuration, or use the IRC oscillator for prototypes to avoid PLL lock failures.
Informations de conformité
RoHS and lead-free per NXP product page. Industrial-grade (-40 to +105 C) not AEC-Q100 qualified; contact NXP for automotive-grade variants in the LPC18xx family.
