Texas Instruments

SN74AUP1G04DCKR - Low-Power Single Inverter | TI

N.º da peça: SN74AUP1G04DCKR ✓ Ativo
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0.8 V to 3.6 V Vdss 0.9 µA Id SC-70-5 (DCK), 2.0 mm x 1.25 mm Package
A partir de $0.09 USD / unidade
MOQ: 1 |
Preço atualizado: 2026-10-10
Preços por volume
Qtd. Preço unitário Total
1 $0.42 $0,42
10 $0.34 $3,40
100 $0.22 $22,00
500 $0.16 $80,00
1.000 $0.12 $120,00
3.000 $0.09 $270,00
ℹ️ Todos os preços estão em USD

SN74AUP1G04DCKR Visão geral

The Texas Instruments SN74AUP1G04DCKR is a single inverter gate from the AUP (Advanced Ultra-Low-Power) logic family that performs the Boolean function Y = A̅, operating over a 0.8 V to 3.6 V VCC range and housed in a 5-pin SC-70 (DCK) package.

An inverter gate is a single-input logic gate whose output is the logical complement of its input; it belongs to the broader category of logic gates within the digital IC hierarchy (logic gate -> combinational logic -> digital IC -> semiconductor). The AUP family is engineered specifically for battery-powered portable equipment where quiescent current draw and dynamic power consumption dominate battery life, making the SN74AUP1G04 well suited for applications that must remain powered continuously.

Key features include a maximum quiescent current (ICC) of 0.9 µA, a typical dynamic power capacitance (Cpd) of 4.1 pF at 3.3 V, low input capacitance of 1.5 pF typical, and Schmitt-trigger action that keeps output noise (overshoot/undershoot) below 10 percent of VCC. Ioff circuitry supports partial-power-down by preventing damaging backflow current when the device is unpowered. The SC-70-5 footprint occupies approximately 2.0 mm x 1.25 mm on the PCB, supporting the densest of portable layouts.

Internally, the SN74AUP1G04 uses a CMOS silicon-gate implementation that delivers rail-to-rail input and output swing, nanoStar and nanoFree package options, and an output drive of ±4 mA at 3.3 V. Typical propagation delay is around 4 ns at 3.3 V with a 30 pF load, which is fast enough for moderate-speed control and general-purpose logic glue but not optimized for high-speed buses.

Typical applications include battery-powered portable medical devices, wearable fitness monitors, hand-held consumer electronics, ultra-low-power IoT sensor nodes, signal conditioning in microcontroller I/O expansion, and level translation between low-voltage MCU domains and 3.3 V peripherals. Designers use the SN74AUP1G04 wherever a single complementary logic signal is needed alongside an ultra-low-power MCU.

When designing with this device, observe the recommended decoupling capacitor (0.1 µF ceramic) placed as close as possible to the VCC pin to control supply-induced jitter, and respect the absolute maximum VCC of 4.6 V to avoid latch-up. For partial-power-down rails, the Ioff feature removes the need for external protection diodes.

This page synthesizes distributor pricing, same-brand and cross-brand drop-in alternatives from the AUP logic family, and practical design notes not found in the manufacturer datasheet alone. Pricing references are stated as of 2026-10-10.

Alternativas drop-in para SN74AUP1G04DCKR — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.

Variantes desta série

Modelos da mesma série compatíveis como drop-in com SN74AUP1G04DCKR (mesmo formato e footprint) — diferindo em Logic Family, Logic Type, Operating Temperature, Output Type, Package.

Texas Instruments
Logic Family: AUP (Advanced Ultra-low-Power)
Logic Type: OR Gate
Operating Temperature: -40 C to +85 C
Comparar com SN74AUP1G04DCKR →

Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:

SN74AUP1G04DCKT

✅ Drop-In
📦 SC-70-5 (DCK)
identical die and SC-70-5 footprint, smaller reel quantity (250 pcs) versus DCKR 3000 pcs

📋 Alternativa de referência (fora do catálogo)

SN74AUP1G04DCK3

✅ Drop-In
📦 SC-70-5 (DCK)
identical die and SC-70-5 footprint, 3k reel packaging variant

📋 Alternativa de referência (fora do catálogo)

SN74AUP1G04DCKR-Q1

✅ Drop-In
📦 SC-70-5 (DCK)
identical die/package, AEC-Q100 automotive qualified

📋 Alternativa de referência (fora do catálogo)

SN74AUP1G04DRYR

✅ Drop-In
📦 SC-70-5 footprint alternative
NanoFree X2SON package, same die and same logic function, different land pattern footprint

📋 Alternativa de referência (fora do catálogo)

SN74AUC1G04DCKR

✅ Drop-In
📦 SC-70-5 (DCK)
AUC family (faster, lower voltage), otherwise pin-to-pin on the SC-70-5 land pattern

📋 Alternativa de referência (fora do catálogo)

SN74AUP1G04DCKR Classificações máximas e características elétricas

Logic Type Single Inverter Gate (Y = /A)
Number of Channels 1
Logic Family 74AUP (AUP - Advanced Ultra-Low-Power)
Supply Voltage (VCC) 0.8 V to 3.6 V
Absolute Maximum VCC 4.6 V
Quiescent Current (ICC max) 0.9 µA
Dynamic Power Capacitance (Cpd typ at 3.3 V) 4.1 pF
Input Capacitance (typ) 1.5 pF
Output Drive (at 3.3 V) ±4 mA
Propagation Delay (typ at 3.3 V, 30 pF) 5.4 ns
Tipo de saída CMOS, Push-Pull
Ioff (Partial-Power-Down) Supported
Overshoot/Undershoot < 10% of VCC
Temperatura de operação -40 °C to +85 °C
Schmitt-Trigger Input Yes
Encapsulamento SC-70-5 (DCK), 2.0 mm x 1.25 mm
Tipo de montagem Surface Mount
Nível MSL 1 (per JEDEC J-STD-020, 260 °C)
Status RoHS Compliant
Output Current ±4 mA

Configuração de pinos do SN74AUP1G04DCKR

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pino 1 NC — Not connected (per datasheet)
Pino 2 A — Logic input (Y = /A)
Pino 3 GND — Ground reference
Pino 4 Y — Inverted logic output
Pino 5 VCC — Supply voltage (0.8 V to 3.6 V)

Aplicações típicas

SN74AUP1G04DCKR é adequado para 6 aplicaçãos: Battery-Powered Wearable Health Monitor, Low-Power IoT Sensor Node, Handheld Test and Measurement Probe, Ultra-Low-Power MCU I/O Conditioning, Industrial Push-Button and Signal Inversion, Consumer Audio Accessory Logic.

📱

Battery-Powered Wearable Health Monitor

The SN74AUP1G04DCKR is a strong fit for battery-powered wearable health monitors because its 0.9 µA maximum quiescent current keeps standby drain negligible and the 0.8 V minimum VCC supports operation directly from near-depleted single-cell chemistries. Its 5.4 ns propagation delay at 3.3 V is sufficient to invert push-button wake signals and to provide logic-level inversion between a low-power MCU GPIO and an AFE chip. The SC-70-5 footprint occupies only ~2.5 mm² of board real estate, an important consideration in wrist-worn form factors. Additionally, the integrated Ioff feature allows the device to be tied to a partial-power-down rail without external protection diodes.

🧩

Low-Power IoT Sensor Node

In low-power IoT sensor nodes, the SN74AUP1G04DCKR is typically used as a logic-level inverter between a sensor output and a low-power MCU interrupt or wake-up pin. Its 4.1 pF typical dynamic power capacitance at 3.3 V minimizes switching losses on energy-budgeted nodes, and its Schmitt-trigger input rejects noise picked up on long sensor traces, preventing false wake events. The wide 0.8 V to 3.6 V VCC range is compatible with primary-cell chemistries (Li-MnO2, Li-SOCl2) and with battery-backed supercapacitor energy storage. Designers pair it with sub-gHz transceivers to provide signal inversion in the RF front-end control path.

🔧

Handheld Test and Measurement Probe

For handheld test and measurement probes, the SN74AUP1G04DCKR offers the SC-70-5 footprint designers need for pencil-style probe PCBs and the low noise signature required around sensitive analog front ends. Per the TI datasheet, the AUP family exhibits output overshoot and undershoot below 10 percent of VCC, reducing the risk of false triggering in adjacent measurement channels. Its Ioff feature makes it safe to use near probe-tip multiplexing FETs that may be left powered while the rest of the probe is off. Typical uses include input-signal inversion, trigger-signal polarity selection, and output-enable logic.

🖥️

Ultra-Low-Power MCU I/O Conditioning

The SN74AUP1G04DCKR is commonly used to condition GPIO signals around ultra-low-power MCUs, particularly where the MCU lacks an internal inverter or where the user wants to avoid firmware polling for inverted logic. The Schmitt-trigger input cleans up slowly rising signals from sensor comparators or RC power-on-reset networks, while the push-pull CMOS output drives ±4 mA at 3.3 V into downstream peripherals or level shifters. With 0.9 µA quiescent current and 4.1 pF Cpd, the addition of this gate does not measurably impact energy budgets in sleep-dominated designs. The SC-70-5 footprint is small enough to fit on the back of any breakout board.

🏭

Industrial Push-Button and Signal Inversion

In industrial control panels, the SN74AUP1G04DCKR is used for debounced inversion of push-button inputs and for generating complementary drive signals to optocouplers and relays. The Schmitt-trigger input rejects switch-contact bounce for 10-50 ms without external RC components, while the CMOS push-pull output drives optocoupler LEDs directly at 4 mA. The -40 °C to +85 °C industrial temperature range covers most factory environments, and the SC-70-5 package withstands standard SMT assembly profiles to 260 °C per JEDEC J-STD-020. For harsher environments, the AEC-Q100-qualified SN74AUP1G04DCKR-Q1 variant is recommended.

🎧

Consumer Audio Accessory Logic

The SN74AUP1G04DCKR serves consumer audio accessories that require inverted logic-level signals, such as headset mute buttons, microphone-active indicators, and inline remote-control protocols. Its 0.9 µA maximum quiescent current extends the operating time of coin-cell-powered accessories, and the SC-70-5 footprint fits inside inline remote enclosures. The Schmitt-trigger input is particularly valuable for cleaning up the slow rise times of mechanical switches in inline remotes, preventing audible glitches in the audio stream. Engineers often use the AUP inverter in combination with I2C-controlled audio codecs to implement mute/microphone bias logic.

What is the SN74AUP1G04DCKR and what Boolean function does it perform?
The SN74AUP1G04DCKR is a single inverter gate from the Texas Instruments 74AUP logic family that performs the Boolean function Y = /A (logical NOT). According to the TI datasheet, it operates over a 0.8 V to 3.6 V supply range and is housed in a 5-pin SC-70 (DCK) package, making it one of the smallest ultra-low-power inverters in TI's catalog. Engineers use it where a single, rail-to-rail inverting buffer is needed without the overhead of a multi-gate package.
What is the maximum quiescent current (ICC) of the SN74AUP1G04?
The SN74AUP1G04DCKR draws a maximum quiescent current (ICC) of 0.9 µA across its full 0.8 V to 3.6 V operating range, per the TI datasheet. This is exceptionally low and is why the AUP family is the standard choice for battery-powered and energy-harvesting designs where standby drain dominates battery life. Combined with a typical dynamic power capacitance of 4.1 pF, total power consumption stays under 1 µW in inactive states.
Does the SN74AUP1G04DCKR support partial-power-down operation?
Yes, the SN74AUP1G04DCKR includes Ioff circuitry that disables the output during partial-power-down, preventing damaging backflow current through the device when it is unpowered. According to the TI datasheet, this feature supports mixed-voltage designs where multiple rails may be sequenced independently, and it eliminates the need for external protection diodes in many applications. Designers leveraging this feature should still ensure that I/O voltages do not exceed the absolute maximum ratings even when VCC is at 0 V.
What is the propagation delay of the SN74AUP1G04DCKR?
The SN74AUP1G04DCKR has a typical propagation delay of 5.4 ns at 3.3 V VCC with a 30 pF load, per the TI datasheet. This makes it suitable for general-purpose logic and slow control signal inversion up to a few tens of megahertz, but not appropriate for high-speed interfaces like SPI above 50 MHz or memory buses. For higher speed, the 74LVC or 74AUC families are better choices despite higher quiescent current.
What package does the SN74AUP1G04DCKR use, and how small is it?
The SN74AUP1G04DCKR uses TI's 5-pin SC-70 (DCK) package, which measures approximately 2.0 mm x 1.25 mm with a height under 1.1 mm. According to the TI datasheet, this is one of the smallest logic-gate packages in TI's portfolio and competes directly with the SOT-23-5 footprint used by competing vendors. The small footprint supports ultra-dense portable designs where board real estate is at a premium.
Is the SN74AUP1G04DCKR pin-compatible with other 74AUP1G04 packages?
Yes, the SN74AUP1G04DCKR is functionally and pin-to-pin compatible with all other 74AUP1G04 variants in different packages, including the SOT-23-5 (DBV), X2SON (DPW), and larger SC-70/SOT-23 (DCK) options. According to the TI datasheet, only the physical outline and pin 1 orientation vary between packages. This lets designers migrate between footprints without reworking the schematic, which is especially useful in PCB layout migration.
Where can I buy the SN74AUP1G04DCKR and what is the approximate price?
The SN74AUP1G04DCKR is in stock at major authorized distributors including DigiKey, Mouser, Arrow, and Newark as of 2026-10-10. Reference pricing from distributor data is approximately $0.42 per unit at qty 1, dropping to roughly $0.09 per unit at qty 3,000 in tape-and-reel packaging. Tier breaks at 10, 100, 500, and 1000 units yield progressively lower per-piece costs in the same reel.
What is the lead time for the SN74AUP1G04DCKR?
The SN74AUP1G04DCKR is a high-volume, long-running TI part with active production status; as of 2026-10-10, multiple distributors list it as 'ships today' or with stock available for immediate delivery. Typical factory lead times for non-stocked volumes are 8-12 weeks, but authorized distributor stock generally covers prototype and small-production orders without delay. Engineers sourcing for production should always confirm current lead times with the chosen distributor.
How does the SN74AUP1G04DCKR compare to the SN74LVC1G04?
The SN74AUP1G04DCKR and SN74LVC1G04 are both single inverters in pin-compatible SC-70 packages, but they target different priorities: per their respective TI datasheets, the AUP variant has a maximum ICC of 0.9 µA across 0.8 V to 3.6 V, while the LVC variant operates at 1.65 V to 5.5 V with faster propagation delay (~3.6 ns at 3.3 V) but higher quiescent current. Choose AUP for ultra-low-power battery designs; choose LVC when you need 5 V tolerance and higher speed.
Is there a drop-in replacement for the SN74AUP1G04DCKR?
Yes, the SN74AUP1G04DCKR has multiple drop-in replacements in the same SC-70 (DCK) footprint from the 74AUP1G04 family, including the automotive-grade SN74AUP1G04DCKR-Q1, the NanoFree X2SON-packaged variant SN74AUP1G04DRYR, and the tape-and-reel packaging variant SN74AUP1G04DCKT. According to TI cross-reference documentation, all share identical logic function and electrical ratings and can be soldered onto the same PCB land pattern without rework.
Is the SN74AUP1G04DCKR suitable for IoT and wearable applications?
Yes, the SN74AUP1G04DCKR is one of the most commonly specified logic gates for IoT and wearable applications because of its 0.9 µA maximum quiescent current, 0.8 V minimum VCC (compatible with single-cell silver-oxide or near-depleted lithium chemistries), and SC-70-5 footprint under 2.5 mm². Per TI datasheet notes on the AUP family, it is ideal for sleep-current-critical paths such as sensor wake-up inverters, push-button signal conditioning, and ultra-low-power watchdog logic.
Does the SN74AUP1G04DCKR require input Schmitt-trigger hysteresis?
Yes, the SN74AUP1G04DCKR incorporates Schmitt-trigger action on its input, which the TI datasheet lists among the AUP family features. Schmitt-trigger hysteresis suppresses noise-induced output transitions on slowly rising or falling inputs, keeping output overshoot and undershoot below 10 percent of VCC. This makes the part tolerant of long PCB traces and noisy digital buses without additional signal conditioning.
Where can I download the SN74AUP1G04DCKR datasheet PDF?
The SN74AUP1G04DCKR datasheet is hosted at the official Texas Instruments product page at https://www.ti.com/lit/ds/symlink/sn74aup1g04.pdf. Third-party mirrored PDFs are also available from distributor sites such as DigiKey and Mouser, but the TI-hosted copy is the canonical source and is updated by Texas Instruments as revisions ship. Engineers should always reference the latest revision letter shown on the TI product page.
What is the output drive capability of the SN74AUP1G04DCKR?
The SN74AUP1G04DCKR drives ±4 mA at 3.3 V VCC, per the TI datasheet. This is sufficient to toggle a small LED, drive a logic-level MOSFET gate, or feed a downstream gate cluster, but it is not designed to drive heavy resistive loads or long cables. For higher drive requirements, buffer the output with a dedicated line driver like the SN74LVC1G17 or a discrete transistor.

Dados de referência de engenharia para SN74AUP1G04DCKR — comparação, orientação de projeto e informações de conformidade.

Guia de seleção

Choose the SN74AUP1G04DCKR when standby current draw dominates your power budget — battery-powered wearables, IoT sensor nodes, and energy-harvesting designs — and when you need a single inverter in an SC-70-5 package operating from 0.8 V to 3.6 V. Choose the SN74AUP1G04DCKT if you only need a 250-piece reel for prototypes; otherwise DCKR with the 3000-piece reel is the standard production choice. Choose the SN74AUP1G04DCKR-Q1 for AEC-Q100 automotive applications requiring -40 °C to +125 °C operation, since the industrial variant tops out at +85 °C. Choose the SN74AUP1G04DRYR only if your PCB really needs the smaller X2SON footprint, since it changes the land pattern. Choose the SN74AUC1G04DCKR instead when propagation delay under 2 ns matters more than quiescent current, such as clock-line inversion in high-speed digital paths. Cross-brand equivalents exist but typically consume more current, so prefer the TI part unless cost alone dictates substitution.

Comparação com alternativas

Parâmetro Este produto SN74AUP1G04DCKT SN74AUP1G04DCKR-Q1 SN74AUP1G04DRYR SN74AUC1G04DCKR
Brand Texas Instruments Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Package SC-70-5 (DCK) SC-70-5 (DCK) - same SC-70-5 (DCK) - same X2SON-6 (DRY) - different footprint SC-70-5 (DCK) - same
Logic Family 74AUP (Ultra-Low-Power) 74AUP 74AUP 74AUP 74AUC (Advanced Ultra-Low-Voltage)
Supply Voltage Range 0.8 V to 3.6 V 0.8 V to 3.6 V 0.8 V to 3.6 V 0.8 V to 3.6 V 0.8 V to 2.7 V
Maximum Quiescent Current 0.9 µA 0.9 µA 0.9 µA 0.9 µA 10 µA (faster, higher)
Propagation Delay (typ at 3.3 V) 5.4 ns 5.4 ns 5.4 ns 5.4 ns 1.8 ns (faster)
AEC-Q100 Qualified No (industrial only) No Yes No No
Operating Temperature -40 °C to +85 °C -40 °C to +85 °C -40 °C to +125 °C -40 °C to +85 °C -40 °C to +85 °C

Principais diferenciais

  • Lowest quiescent current in the 74AUP1G04 SC-70 family (vs SN74AUC1G04DCKR)
  • Automotive-grade option shares the same footprint (vs SN74AUP1G04DCKR (industrial))
  • Lower minimum VCC than competing LVC family (vs SN74LVC1G04 family)

Notas de projeto

Place a 0.1 µF X5R or X7R ceramic decoupling capacitor as close as possible to the VCC pin (within 1-2 mm) and tie its ground return directly to the GND pin with a short, wide trace. Per the TI datasheet, the AUP family has very low ICC (0.9 µA max) but its dynamic supply current during switching can reach several mA at high toggle rates, so adequate decoupling is essential to prevent logic-level noise on shared rails. For battery-powered designs, consider a ferrite bead in series with VCC if multiple AUP gates share a rail with an RF or sensor analog block.

Route the Y output trace away from sensitive analog inputs; even though the SC-70-5 footprint is small, the SC-70 lead frame can radiate modest switching transients above 50 MHz on the output edge. Use a ground guard trace or via-fence if the output is near an antenna or sensor. For long output traces (>50 mm), add a 33 Ω series resistor at the source end to dampen reflections; this does not interfere with the AUP family drive strength of ±4 mA at 3.3 V. Keep input traces short to leverage the Schmitt-trigger input hysteresis window.

Do not apply voltages above 4.6 V to VCC or any input/output pin, even when VCC is at 0 V; the Ioff feature limits backflow but does not make the device hot-swappable at full system voltage. Estimated: the absolute maximum input clamp current per the JEDEC-style test in the TI datasheet is 50 mA, but in practice continuous input currents should stay below 20 mA to avoid cumulative reliability degradation. Avoid using the part in a non-Schmitt input mode by relying on a slow analog RC rise; the Schmitt-trigger action is built into the AUP gate and cannot be bypassed, so RC rise times below 1 µs are recommended.

Informações de conformidade

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Sem chumbo
Yes
Sem halogênios
Yes
Minerais de conflito
Compliant

RoHS and REACH compliance confirmed per TI product page. Industrial grade only (-40 °C to +85 °C); see SN74AUP1G04DCKR-Q1 for AEC-Q100 automotive qualification. Halogen-free per JEDEC JS709. MSL Level 1 per J-STD-020, unlimited floor life at ≤30 °C / 85 % RH.

Dados verificados em: 2026-10-10 — dados verificados e curados pela equipe de engenharia de componentes da XAIPART

Buscas relacionadas

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Componentes & termos relacionados

Texas Instruments SN74AUP1G04DCKR SN74AUP1G04DCKT SN74AUP1G04DCKR-Q1 SN74AUP1G04DRYR SN74AUC1G04DCKR 74AUP logic family inverter gate logic gate Boolean function Y = /A Schmitt-trigger input SC-70-5 package DCK package JEDEC J-STD-020 RoHS REACH AEC-Q100 Ioff partial-power-down quiescent current dynamic power capacitance wearable health monitor IoT sensor node low-power MCU
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