IPG20N04S4L07ATMA1 vs IPD50N04S408ATMA1 Сравнение
Подробное сравнение бок о бок IPG20N04S4L07ATMA1 от Infineon и IPD50N04S408ATMA1 от Infineon. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Infineon
IPG20N04S4L07ATMA1 - 40V 20A Dual N-Ch MOSFET 7.2mΩ | Infineon
IPG20N04S4L07ATMA1 ✓ АктивенСравнение характеристик
| Параметр | IPG20N04S4L07ATMA1 | IPD50N04S408ATMA1 |
|---|---|---|
| Бренд | Infineon | Infineon |
| Категория | MOSFETs | MOSFETs |
| Статус жизненного цикла | Активен | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $1,65 | $0,69 |
| Manufacturer | Infineon Technologies | Infineon Technologies |
| Series | OptiMOS™ T2 | — |
| FET Type | 2x N-Channel (Dual, Independent) | — |
| Drain-to-Source Voltage (VDS) | 40 V | — |
| Continuous Drain Current (ID) | 20 A | — |
| RDS(on) Max @ VGS=10V | 7.2 mΩ (typical) | — |
| Gate Threshold Voltage (VGS(th)) | [DATA_NEEDED: VGS(th) typical value] | — |
| Gate Charge (Qg) | [DATA_NEEDED: total gate charge at VGS=10V] | — |
| Power Dissipation (PD) Max | 65 W | — |
| Рабочая температура перехода | -55°C to +175°C | — |
| Корпус | PG-TDSON-8-4 (TDSON-8-4) | PG-TO252-3-313 (DPAK) |
| Тип монтажа | Surface Mount | Surface Mount |
| Logic-Level Gate Drive | Yes (4.5V VGS fully enhanced) | — |
| Уровень MSL | MSL1 (per JEDEC J-STD-020, 260°C peak reflow) | MSL1 (260 °C peak reflow) |
| AEC-Q101 Qualification | Qualified | — |
| Avalanche Tested | 100% (per datasheet) | 100 % Avalanche tested |
| RoHS / Lead-Free | RoHS compliant, lead-free terminations | — |
| Product Family | — | OptiMOS-T2 |
| Polarity | — | N-Channel |
| Mode | — | Enhancement-mode |
| Drain-Source Voltage (V DS) | — | 40 V |
| Continuous Drain Current (I D, Tc) | — | 50 A |
| Power Dissipation (P D, Tc) | — | 46 W |
| Диапазон рабочих температур | — | -55 °C to +175 °C |
| Automotive Qualification | — | AEC-Q101 |
| Green Package (RoHS) | — | RoHS compliant |
| Gate Threshold Voltage (V GS(th)) | — | [DATA_NEEDED: V GS(th) typical] |
| On-State Resistance (R DS(on)) | — | [DATA_NEEDED: R DS(on) at V GS = 10 V] |
| Total Gate Charge (Q G) | — | [DATA_NEEDED: Q G typical] |