5M80ZM68I5N vs 5M240ZM68I5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng 5M80ZM68I5N sa pamamagitan ng Intel at 5M240ZM68I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
5M240ZM68I5N 5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro 5M80ZM68I5N 5M240ZM68I5N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family MAX V —
Macro Cells 64 —
Logic Array Blocks (LABs) 4 —
Maximum Operating Frequency 118.3 MHz —
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
User I/O Pins 52 —
User Flash Memory 160 bits —
Core Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) —
I/O Voltage (VCCIO) 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Packhaging 68-ball MBGA (5M80ZM68) —
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40C to +100C (Industrial) —
Programming Interface JTAG (IEEE 1149.1) + ISP —
Operating Mode Non-volatile, instant-on —
Tindminan RoHS Compliant Compliant
Lead-Free / Halogen-Free Yes / Unknown —
Device Type — CPLD (Complex Programmable Logic Device)
Series — MAX V
Logic Elements — 240
Number of Macrocells — 192
Propagation Delay (tPD) — 7.5 ns
Configuration Memory — Nonvolatile Flash
Package Type — TFBGA-68
Number of Terminals — 68 (ball)
Package Code — TFBGA
Form of Terminal — Ball
Package Shape — Square
Operating Temperature Grade — Industrial
JTAG Interface — TMS, TDI, TDO, TCK (Bank 1)
Programming Method — JTAG / in-system programmable
Volte ng Pagbibigay — [DATA_NEEDED: VCCINT and VCCIO levels]
I/O Standards — Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins)
Lead Free — Yes

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