5M80ZM68I5N vs 5M240ZM68I5N 比較
詳細並排比較 5M80ZM68I5N 由 Intel 與 5M240ZM68I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M80ZM68I5N | 5M240ZM68I5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX V | — |
| Macro Cells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| User I/O Pins | 52 | — |
| User Flash Memory | 160 bits | — |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 封裝 | 68-ball MBGA (5M80ZM68) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +100C (Industrial) | — |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | — |
| Operating Mode | Non-volatile, instant-on | — |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free / Halogen-Free | Yes / Unknown | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Series | — | MAX V |
| Logic Elements | — | 240 |
| Number of Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Configuration Memory | — | Nonvolatile Flash |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| 供應電壓 | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| Lead Free | — | Yes |