ADC1213D105HN-C18 vs ADC1213D080HN-C18 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ADC1213D105HN-C18 sa pamamagitan ng Renesas Electronics at ADC1213D080HN-C18 sa pamamagitan ng Renesas Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Renesas Electronics
ADC1213D105HN-C18 - Dual 12-bit 105MSPS ADC, JESD204A | Renesas
ADC1213D105HN-C18 ✓ NakahandaRenesas Electronics
ADC1213D080HN-C18 - 12-bit 80MSPS Dual ADC with JESD204A | Renesas
ADC1213D080HN-C18 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ADC1213D105HN-C18 | ADC1213D080HN-C18 |
|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12 bit | 12 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (dual, simultaneous sampling) |
| Sampling Rate (per channel) | 105 MSPS | — |
| Sampling Rate (per second) | 105M | — |
| Architecture | Pipelined | Pipelined |
| Data Interface | Serial JESD204A (configurable lanes) | — |
| Input Type | Differential analog inputs | Differential / single-ended (configurable) |
| Number of Inputs | 2 | — |
| Packhaging | 56-VFQFPN exposed pad (8x8 mm) | 56-VFQFPN exposed pad (8x8 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packaging | Tape & Reel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Volte ng Pagbibigay | [DATA_NEEDED: supply voltage] | — |
| Power Dissipation | [DATA_NEEDED: power dissipation] | — |
| INL (max) | [DATA_NEEDED: INL] | — |
| DNL (max) | [DATA_NEEDED: DNL] | — |
| SNR | [DATA_NEEDED: SNR] | [DATA_NEEDED: SNR dBFS at fIN] |
| SFDR | [DATA_NEEDED: SFDR] | [DATA_NEEDED: SFDR dBc] |
| Sampling Rate per Channel | — | 80 MSPS |
| Data Output Interface | — | JESD204A (serial, up to 3.125 Gbps lane) |
| Analog Supply Voltage (AVDD) | — | 1.8 V |
| Digital/Drive Supply Voltage (DRVDD) | — | 3.3 V |
| Input Bandwidth | — | [DATA_NEEDED: full-power input bandwidth MHz] |
| ENOB | — | [DATA_NEEDED: ENOB bits at fIN] |
| Power Consumption | — | [DATA_NEEDED: power mW per channel at 80 MSPS] |
| Configuration Interface | — | SPI-compatible serial |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |