ADS62P28IRGC25 vs ADS62P48IRGC25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ADS62P28IRGC25 sa pamamagitan ng Texas Instruments at ADS62P48IRGC25 sa pamamagitan ng Texas Instruments. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
ADS62P28IRGC25 - Dual 12-Bit 210-MSPS ADC with DDR LVDS/CMOS | TI
ADS62P28IRGC25 ✓ NakahandaTexas Instruments
ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments
ADS62P48IRGC25 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | ADS62P28IRGC25 | ADS62P48IRGC25 |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12 bit | 14 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Rate ng Pagkupita | 210 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential / Single-ended | Differential analog inputs |
| Full-Scale Input Range | 1 Vpp to 2 Vpp (programmable) | — |
| Output Interface | DDR LVDS / Parallel CMOS (selectable) | DDR LVDS / Parallel CMOS (selectable) |
| SNR | 70 dBFS (typical at 70 MHz IF) | — |
| SFDR | 85 dBc (typical at 70 MHz IF) | — |
| Analog Supply Voltage | 3.3 V | 1.8 V |
| Digital Supply Voltage | 1.8 V (LVDS mode) | 3.3 V |
| Power Dissipation | 1.7 W typical | — |
| Input Bandwidth | 450 MHz (3 dB) | — |
| Packhaging | 64-VQFN (RGC) 9x9 mm with exposed pad | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | — |
| Tindminan RoHS | Compliant | Compliant |
| Sample Rate (max) | — | 210 MSPS |
| Hanay ng Temperature na Operasyon | — | -40 C to +85 C (Industrial) |
| Packhaging / Kaso | — | 64-VQFN (RGC) 9x9 mm (HVQCCN) |
| Bilang ng Pin | — | 64 |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng MSL | — | 3 |
| Lead Free | — | Yes |
| Input Clock Type | — | LVDS differential clock |
| Internal Dither | — | Yes (programmable) |
| Programmable Gain | — | Yes (improves SFDR at lower FS inputs) |