EP1C3T100C8N vs EP1C3T100C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1C3T100C8N sa pamamagitan ng Intel at EP1C3T100C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1C3T100C8N | EP1C3T100C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Tapus ng Buhay |
| Family | Cyclone | Cyclone I |
| Logic Elements | 2,910 | 2,910 LEs |
| Logic Array Blocks (LABs) | 291 | — |
| Total RAM Bits | 59,904 | 59,904 bits |
| Embedded RAM Blocks | 13 x M4K (4 Kbit each) | — |
| Maximum User I/Os | 65 | — |
| PLLs | 1 | 1 general-purpose PLL |
| Operating Frequency (max) | 275 MHz | — |
| Core Voltage | 1.425 V to 1.575 V | — |
| Process Technology | 130 nm CMOS | — |
| Packhaging | TQFP-100 (100-pin Thin Quad Flat Pack), 16 x 16 mm, 0.5 mm pitch | TQFP-100 (14x14 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0C to +85C (commercial) |
| Configuration Interface | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | Compliant (lead-free, 'N' suffix) | Compliant |
| Core Process | — | 0.13 µm SRAM |
| Core Voltage (VCCINT) | — | 1.5 V |
| M4K RAM Blocks | — | 13 (4 Kbit each) |
| Embedded Multipliers | — | Not present on EP1C3 |
| Global Clock Networks | — | 8 |
| User I/O Pins | — | 65 |
| Speed Grade | — | -8 (commercial) |
| Configuration Modes | — | AS, PS, JTAG |
| I/O Standards | — | LVTTL, LVCMOS, SSTL-2/3, LVDS, RSDS |
| Lifecycle | — | EOL per PDN1810 (since 2019) |