EP1S60B956C6 vs EP1S30B956C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60B956C6 sa pamamagitan ng Altera at EP1S30B956C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S60B956C6 | EP1S30B956C6 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix (EP1S) | — |
| Logic Elements | 57,120 | — |
| Total RAM Bits | 5,215,104 | — |
| Number of LABs/CLBs | 5712 | — |
| Number of I/O | 683 | — |
| Packhaging | 956-BBGA, FCBGA (40 x 40 mm) | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch |
| Supplier Device Package | 956-BGA (40x40) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | 0 C to 85 C (Commercial) |
| Core Voltage - Supply | 1.425 V to 1.575 V | — |
| Voltage - Supply | 1.425 V to 1.575 V | — |
| Bilang ng Pins | 956 | — |
| Form of Terminal | Ball (BGA) | — |
| Package Code | BGA / FCBGA | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Not confirmed - pre-RoHS part |
| Family | — | Stratix |
| Logic Elements (LEs) | — | 32,470 |
| Logic Array Blocks (LABs) | — | 3,247 |
| Embedded Memory Bits | — | 3,317,184 (approximately 3.4 Mbit) |
| Maximum User I/O | — | 683 |
| Process Technology | — | 130 nm CMOS |
| Core Voltage (VCCINT) | — | 1.5 V |
| Speed Grade | — | C6 |
| Maximum Internal Frequency | — | 450.05 MHz (per family datasheet) |
| DSP Blocks | — | Yes (Stratix DSP blocks) |
| PLLs | — | Up to 12 |
| Configuration Modes | — | Passive Serial (PS), Passive Parallel (PP), JTAG |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | Unknown |