EP1S60F1020C6NAA vs EP1S60F1020C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020C6NAA sa pamamagitan ng Altera at EP1S60F1020C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S60F1020C6NAA | EP1S60F1020C6N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix | Stratix (EP1S) |
| Series | EP1S60 | Stratix |
| Logic Elements | 57,120 | — |
| Total RAM Bits | 5,215,104 | — |
| Embedded Multipliers | 192 (18x18) | 773 (18x18) |
| Maximum User I/O Pins | 773 | Per datasheet, package-dependent (F1020 variant) |
| Number of LABs/CLBs | 4,510 | — |
| Number of Logic Cells | 57,120 | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0°C to +85°C (Commercial) |
| Packhaging | 1020-BBGA (FineLine BGA), 33x33 mm, 1.0 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Process Node | 0.13 µm CMOS | — |
| Voltage - Core | 1.5 V | — |
| Voltage - I/O | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Speed Grade | C6 | C6 (mid-tier) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Configuration Scheme | Passive Serial / Fast Passive Parallel / JTAG | — |
| Number of PLLs | 12 | — |
| Global Clocks | 40 | — |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Volte ng Pagbibigay | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Tindminan RoHS | — | Compliant (per 'N' suffix) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |