EP1S60F1020C6NAA vs EP1S60F1020C6N 对比

详细并排对比 EP1S60F1020C6NAA 出自 Altera 和 EP1S60F1020C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S60F1020C6NAA EP1S60F1020C6N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $145.00 $195.00
Family Stratix Stratix (EP1S)
Series EP1S60 Stratix
Logic Elements 57,120 —
Total RAM Bits 5,215,104 —
Embedded Multipliers 192 (18x18) 773 (18x18)
Maximum User I/O Pins 773 Per datasheet, package-dependent (F1020 variant)
Number of LABs/CLBs 4,510 —
Number of Logic Cells 57,120 —
工作温度 0C to +85C (commercial) 0°C to +85°C (Commercial)
封装 1020-BBGA (FineLine BGA), 33x33 mm, 1.0 mm pitch —
安装类型 Surface Mount Surface Mount (BGA)
Process Node 0.13 µm CMOS —
Voltage - Core 1.5 V —
Voltage - I/O 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) —
Speed Grade C6 C6 (mid-tier)
Lead-Free / RoHS Yes (N suffix) —
Configuration Scheme Passive Serial / Fast Passive Parallel / JTAG —
Number of PLLs 12 —
Global Clocks 40 —
Logic Elements (LEs) — 57,120
Logic Cells — 6,570 blocks (per chipdig datasheet summary)
Embedded RAM (Total Bits) — 5,215,104 bits
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
电源电压 — Per datasheet (Stratix Device Handbook Vol. 1)
Lead-Free / Pb-Free — Yes (suffix 'N')
RoHS 状态 — Compliant (per 'N' suffix)
MSL 等级 — [DATA_NEEDED: MSL rating]
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

数据手册与资源

浏览全部产品 创建 BOM 获取报价