EP1SGX25DF1020C6B vs EP1SGX25DF1020C6ESL Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF1020C6B sa pamamagitan ng Altera at EP1SGX25DF1020C6ESL sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoletePagsanggunian na paghahambing
| Parametro | EP1SGX25DF1020C6B | EP1SGX25DF1020C6ESL |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | Stratix GX | — |
| Family | EP1SGX25 | Stratix GX |
| Logic Elements | 25,660 | 25,660 |
| Total Memory Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Packhaging | 1020-BBGA (33 × 33 mm, 1.0 mm pitch) | 1020-BBGA (FineLine BGA) |
| Supply Voltage (Core) | 1.5 V | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | — |
| Speed Grade | C6 | C6 |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes (per DigiChip package note) | — |
| Transceivers | Embedded high-speed serial transceivers (multi-gigabit) | Embedded multi-gigabit transceivers (per Stratix GX family) |
| PLLs | On-chip phase-locked loops for clock management | — |
| DSP Blocks | Hardware multipliers / DSP blocks | Yes (embedded DSP blocks) |
| External Memory Support | DDR, DDR2, SDR, QDR, QDRII SRAM | — |
| Hard IP | PCI Express (per Stratix GX family) | — |
| Total RAM Bits | — | 1,944,576 bits |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Core Voltage | — | 1.5 V |
| Temperature ng Junction na Operasyon | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |