EP1SGX25DF1020C6B vs EP1SGX25DF1020C6ESL 比較
詳細並排比較 EP1SGX25DF1020C6B 由 Altera 與 EP1SGX25DF1020C6ESL 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL Obsolete規格比較
| 參數 | EP1SGX25DF1020C6B | EP1SGX25DF1020C6ESL |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Series | Stratix GX | — |
| Family | EP1SGX25 | Stratix GX |
| Logic Elements | 25,660 | 25,660 |
| Total Memory Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| 封裝 | 1020-BBGA (33 × 33 mm, 1.0 mm pitch) | 1020-BBGA (FineLine BGA) |
| Supply Voltage (Core) | 1.5 V | — |
| 工作溫度 | 0 °C to 85 °C (Commercial) | — |
| Speed Grade | C6 | C6 |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes (per DigiChip package note) | — |
| Transceivers | Embedded high-speed serial transceivers (multi-gigabit) | Embedded multi-gigabit transceivers (per Stratix GX family) |
| PLLs | On-chip phase-locked loops for clock management | — |
| DSP Blocks | Hardware multipliers / DSP blocks | Yes (embedded DSP blocks) |
| External Memory Support | DDR, DDR2, SDR, QDR, QDRII SRAM | — |
| Hard IP | PCI Express (per Stratix GX family) | — |
| Total RAM Bits | — | 1,944,576 bits |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Core Voltage | — | 1.5 V |
| 工作接面溫度 | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |