EP1SGX25DF672C6 vs EP1SGX25DF67216 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672C6 sa pamamagitan ng Intel at EP1SGX25DF67216 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1SGX25DF672C6 EP1SGX25DF67216
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series Stratix GX —
Logic Elements 25,660 LE 25,660
Number of LABs 2,566 —
Total RAM Bits 1,944,576 bits 1,944,576
User I/O Count 455 —
Number of Transceivers 6 channels (per Stratix GX family) —
Max Transceiver Data Rate 3.125 Gbps 3.1875 Gbps per channel
Core Voltage 1.5 V —
Temperature na Operasyon 0C to +85C (commercial) Industrial, -40C to +100C (I-suffix family)
Packhaging 672-BBGA FineLine BGA 672-ball FineLine BGA (DF672)
Package Dimensions 33 x 33 mm —
Ball Pitch 1.0 mm —
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Lead-Free (per FBGA suffix family) —
Process Technology CMOS —
Family — Stratix GX
Embedded Multipliers (18x18) — [DATA_NEEDED: 18x18 multiplier count]
Number of PLLs — 4
Number of Transceiver Channels — 8 (4 in each of 2 banks)
Min Transceiver Data Rate — 500 Mbps
Core Supply Voltage — 1.5 V
Auxiliary Supply Voltage — 3.3 V
I/O Supply Voltage — 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank)
Maximum User I/O Pins — [DATA_NEEDED: user I/O count for DF672 package]
On-Die Termination — Yes, 100-ohm differential
Pre-emphasis / Equalization — Programmable (transmitter pre-emphasis; receiver adaptive equalization)
Configuration Schemes — Passive serial, fast passive parallel, JTAG, Altera enhanced configuration
Tindminan RoHS — Lead-free / RoHS compliant (per Altera product family documentation)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita