EP20K100QC240-3 vs EP20K100QC240-1XV Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100QC240-3 sa pamamagitan ng Altera at EP20K100QC240-1XV sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K100QC240-1XV - APEX 20K 100K-Gate FPGA, 240-PQFP | Intel / Altera
EP20K100QC240-1XV ObsoletePagsanggunian na paghahambing
| Parametro | EP20K100QC240-3 | EP20K100QC240-1XV |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Manufacturer | Altera | — |
| FPGA Family | APEX-20K | — |
| Number of Logic Elements | 4160 cells | — |
| Total RAM Bits | 53248 bits | — |
| Number of User I/O | 189 | — |
| Typical Gate Count | 263000 gates | — |
| Core Supply Voltage | 2.5 V | — |
| Maksimum na Taktiko ng Oras | 167 MHz (family rating) | — |
| Speed Grade | -3 | — |
| Technology Process | 0.22 um | — |
| Package Type | 240-BFQFP | — |
| Bilang ng Pins | 240 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (gull-wing leads) |
| Hanay ng Temperature na Operasyon | 0 °C to +85 °C (commercial) | — |
| Propagation Delay | [DATA_NEEDED: propagation delay timing table] | — |
| Supported I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration / JTAG Interface | [DATA_NEEDED: configuration and JTAG interface details] | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance for non-N version] | — |
| Series | — | APEX 20K |
| Device Family | — | APEX 20K (MultiCore architecture) |
| System Gates | — | 100,000 gates |
| Logic Elements (Cells) | — | 4,160 |
| Embedded Memory | — | 53,248 bits |
| User I/Os | — | 189 |
| Dedicated Inputs | — | 4 |
| PLLs | — | 4 |
| Core Supply Voltage (VCCINT) | — | 2.5 V nominal (2.375 V to 2.625 V) |
| I/O Supply Voltage (VCCIO) | — | 3.3 V / 5 V tolerant |
| Propagation Delay (tpd) | — | 2.5 ns |
| Maximum Internal Frequency | — | 250 MHz |
| Process Technology | — | 0.22 um CMOS |
| Packhaging | — | 240-pin PQFP (32 x 32 mm, 0.5 mm pitch) |
| Temperature na Operasyon | — | 0C to +85C (commercial) / -40C to +85C (industrial variant) |
| Configuration Interface | — | JTAG / serial (EPC configuration device) |
| Tindminan RoHS | — | Non-compliant (legacy PQFP, non-LEAD-FREE process) |
| Katayuan ng Lifecycle | — | Obsolete / last-time-buy per Altera PCN |