EP20K100QC240-3 vs EP20K100QC240-1XV 比較

詳細並排比較 EP20K100QC240-3 由 Altera 與 EP20K100QC240-1XV 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K100QC240-3 EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 ✓ 啟用中

規格比較

參數 EP20K100QC240-3 EP20K100QC240-1XV
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 Obsolete
Manufacturer Altera —
FPGA Family APEX-20K —
Number of Logic Elements 4160 cells —
Total RAM Bits 53248 bits —
Number of User I/O 189 —
Typical Gate Count 263000 gates —
Core Supply Voltage 2.5 V —
最大時脈頻率 167 MHz (family rating) —
Speed Grade -3 —
Technology Process 0.22 um —
Package Type 240-BFQFP —
腳位數 240 —
安裝類型 Surface Mount Surface Mount (gull-wing leads)
工作溫度範圍 0 °C to +85 °C (commercial) —
Propagation Delay [DATA_NEEDED: propagation delay timing table] —
Supported I/O Standards [DATA_NEEDED: supported I/O standards] —
Configuration / JTAG Interface [DATA_NEEDED: configuration and JTAG interface details] —
RoHS Compliance [DATA_NEEDED: RoHS compliance for non-N version] —
Series — APEX 20K
Device Family — APEX 20K (MultiCore architecture)
System Gates — 100,000 gates
Logic Elements (Cells) — 4,160
Embedded Memory — 53,248 bits
User I/Os — 189
Dedicated Inputs — 4
PLLs — 4
Core Supply Voltage (VCCINT) — 2.5 V nominal (2.375 V to 2.625 V)
I/O Supply Voltage (VCCIO) — 3.3 V / 5 V tolerant
Propagation Delay (tpd) — 2.5 ns
Maximum Internal Frequency — 250 MHz
Process Technology — 0.22 um CMOS
封裝 — 240-pin PQFP (32 x 32 mm, 0.5 mm pitch)
工作溫度 — 0C to +85C (commercial) / -40C to +85C (industrial variant)
Configuration Interface — JTAG / serial (EPC configuration device)
RoHS 狀態 — Non-compliant (legacy PQFP, non-LEAD-FREE process)
生命週期狀態 — Obsolete / last-time-buy per Altera PCN

資料表與資源

瀏覽所有產品 建立 BOM 索取報價