EP20K200BC356-2XV vs EP20K200CB356C8N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200BC356-2XV sa pamamagitan ng Altera at EP20K200CB356C8N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K200BC356-2XV EP20K200CB356C8N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX-20K APEX 20KC
Series APEX-20K® EP20K200
Number of LABs/CLBs 832 —
Number of Logic Elements / Cells 8320 —
Total RAM Bits 106496 —
Number of I/O 277 —
Number of Gates 526000 —
Core Voltage Supply 2.375 V to 2.625 V —
Uri ng Pagpapasok Surface Mount —
Temperature na Operasyon 0 °C to 85 °C (TJ) —
Packhaging / Kaso 356-LBGA (Ball Grid Array) —
Speed Grade -2 —
Configuration Memory SRAM-based (volatile) —
Programming Interface JTAG (IEEE 1149.1) —
Tindminan RoHS [DATA_NEEDED: RoHS compliance flag] [DATA_NEEDED: RoHS compliance]
Device Type — SRAM-based LUT FPGA
System Gates — 200,000
Logic Elements (Cells) — 8,320
Maximum Internal Frequency — 301.21 MHz
Process Technology — 0.15 um CMOS
Propagation Delay (tpd) — 1.78 ns
Nominal Core Supply Voltage — 1.8 V
Core Supply Voltage Range — 1.71 V to 1.89 V
Number of User I/O Pins — 263
Number of Dedicated Inputs — 4
Total Macrocells / Output Functions — 263
Embedded Memory Bits — 106,496 bits
Number of PLLs — 4
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Differential Signaling — LVDS
Configuration Interface — Serial / JTAG (IEEE 1149.1)
Packhaging — 356-ball LBGA
Operating Temperature (commercial "C") — 0 C to +85 C (TJ)
Terminal Finish ("N") — Lead-free / Pb-free
Level ng Sensitivity sa Asid ng Moisture (MSL) — [DATA_NEEDED: MSL rating]

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