EP20K200BC356-2XV vs EP20K200CB356C8N 比較
詳細並排比較 EP20K200BC356-2XV 由 Altera 與 EP20K200CB356C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K200BC356-2XV - APEX-20K FPGA, 8320 LE, 356-BGA | Altera/Intel
EP20K200BC356-2XV Obsolete規格比較
| 參數 | EP20K200BC356-2XV | EP20K200CB356C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX-20K | APEX 20KC |
| Series | APEX-20K® | EP20K200 |
| Number of LABs/CLBs | 832 | — |
| Number of Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 | — |
| Number of I/O | 277 | — |
| Number of Gates | 526000 | — |
| Core Voltage Supply | 2.375 V to 2.625 V | — |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | 0 °C to 85 °C (TJ) | — |
| 封裝 / 外殼 | 356-LBGA (Ball Grid Array) | — |
| Speed Grade | -2 | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance flag] | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | SRAM-based LUT FPGA |
| System Gates | — | 200,000 |
| Logic Elements (Cells) | — | 8,320 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Process Technology | — | 0.15 um CMOS |
| Propagation Delay (tpd) | — | 1.78 ns |
| Nominal Core Supply Voltage | — | 1.8 V |
| Core Supply Voltage Range | — | 1.71 V to 1.89 V |
| Number of User I/O Pins | — | 263 |
| Number of Dedicated Inputs | — | 4 |
| Total Macrocells / Output Functions | — | 263 |
| Embedded Memory Bits | — | 106,496 bits |
| Number of PLLs | — | 4 |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Differential Signaling | — | LVDS |
| Configuration Interface | — | Serial / JTAG (IEEE 1149.1) |
| 封裝 | — | 356-ball LBGA |
| Operating Temperature (commercial "C") | — | 0 C to +85 C (TJ) |
| Terminal Finish ("N") | — | Lead-free / Pb-free |
| 濕度敏感等級 (MSL) | — | [DATA_NEEDED: MSL rating] |