EP20K400FI672-2N vs EP20K400FI672-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FI672-2N sa pamamagitan ng Altera at EP20K400FI672-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400FI672-2N | EP20K400FI672-2X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | APEX 20K | APEX 20K |
| Typical Gates | 400,000 | 400,000 system gates |
| Logic Elements / Cells | 16,640 | — |
| Maximum User I/O | 488 | — |
| Embedded Memory Bits | 212,992 bits | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count per family datasheet] | — |
| Process Technology | 0.22 µm CMOS | 0.18 um CMOS, 6-metal |
| Core Voltage | 2.5 V | 1.8 V |
| Maximum Frequency | 200 MHz | — |
| Packhaging | 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | 672-ball BGA (FI672) |
| Package Body Size | 27 x 27 mm | — |
| Terminal Pitch | 1.0 mm | — |
| Propagation Delay | 3.1 ns | — |
| Speed Grade | -2 | -2X |
| Temperature na Operasyon | Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] | -40C to +85C (industrial) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 | — |
| Peak Reflow Temperature | 220 °C | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance] |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, HSTL | — |
| Logic Elements | — | 16,640 |
| Embedded Memory | — | 212,992 bits |
| User I/O Pins | — | 496 |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| No. of Terminals | — | 672 |
| Package Shape | — | Square |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Configuration Method | — | SRAM (serial EPROM or JTAG) |
| JTAG Support | — | Yes (IEEE 1149.1) |