EP20K600CF33C9 vs EP20K600CF33C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF33C9 sa pamamagitan ng Intel at EP20K600CF33C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF33C9 | EP20K600CF33C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Process Technology | 0.15 µm CMOS | — |
| System Gates | 600,000 (maximum) | — |
| Logic Elements / Cells | 24,320 | 24,320 |
| Maximum Operating Frequency | 250 MHz | — |
| Maksimum na Taktiko ng Oras | 303.03 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | — |
| User I/O | 588 (4 dedicated inputs + 580 general-purpose I/O) | — |
| Packhaging | 1020-ball FC-FBGA | 1020-pin FC-FBGA (flip-chip) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM | Dual-port RAM blocks (per family) | — |
| Programmability | JTAG / IEEE 1149.1 ISP, SRAM-based | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (N suffix) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Logic Block Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS (per family datasheet) | — |
| Total RAM Bits | — | 311,296 |
| Number of LABs / CLBs | — | 2,432 |
| Number of Gates | — | 1,537,000 (max) |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | — | 0.15 µm CMOS |
| Maximum Internal Frequency | — | 301.21 MHz |
| Speed Grade | — | -8 (slower than -7) |
| Temperature na Operasyon | — | 0°C to 85°C (TJ) |
| Pitch | — | 0.33 mm |
| Programmable Type | — | In-System / SRAM-based |
| Configuration Interface | — | JTAG (IEEE 1149.1) + Passive Serial / Parallel |