EP2AGZ300FF35C3N vs EP2AGZ300FF35C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C3N sa pamamagitan ng Intel at EP2AGZ300FF35C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C3N | EP2AGZ300FF35C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Arria II GZ | — |
| Logic Elements (LE) | 298,000 | — |
| Logic Array Blocks (LABs) | 11,920 | 11,920 |
| Embedded Memory (Bits) | 18,854,912 | — |
| User I/Os | 554 | — |
| Maximum User I/O Pins (Package) | 1,152 | — |
| 18x18 Multipliers | 554 | — |
| Transceivers | Up to 16 channels | Multi-gigabit transceivers integrated |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| Process Technology | 40 nm | 40 nm |
| Core Voltage | 0.9 V | 0.9 V |
| PLLs | 8 | [DATA_NEEDED: PLL count] |
| Packhaging | 1152-ball FCBGA (FF35) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Operating Temperature Grade | Commercial | Commercial (C4 = 0C to +85C) |
| Series | — | Arria II GZ |
| Logic Elements | — | 298,000 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Package Type | — | 1152-BBGA, FCBGA (flip-chip) |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks] |
| Tindminan RoHS | — | Compliant (per Besenchips / DigiKey listing) |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Maximum Operating Frequency | — | 500 MHz |