EP2C8F256C8N vs EP2C5F256C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C8F256C8N sa pamamagitan ng Altera at EP2C5F256C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2C5F256C8N - Cyclone II FPGA, 4.6K LEs, 158 I/O | Altera / Intel
EP2C5F256C8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2C8F256C8N | EP2C5F256C8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Cyclone II | — |
| Logic Elements | 8256 | — |
| Embedded Memory | 165888 bit | — |
| Programmable I/O Count | 182 | — |
| Packhaging | 256-LBGA | 256-ball FineLine BGA (FBGA-256) |
| Package Pin Count | 256 pin | — |
| Volte ng Pagbibigay | 3.3 V | — |
| Maximum Frequency | 156 MHz | — |
| Tindminan RoHS | unknown | Compliant (lead-free) |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Core Voltage Range | [DATA_NEEDED: core voltage range] | — |
| Family | — | Cyclone II |
| Logic Elements (LE) | — | 4,608 |
| Logic Array Blocks (LAB) | — | 288 |
| Embedded Memory (M4K blocks) | — | 119,808 bits (~14.6 Kbytes) |
| Embedded 18x18 Multipliers | — | 13 |
| PLLs | — | 2 |
| Maximum User I/O Pins | — | 158 |
| Process Technology | — | 90 nm low-k CMOS |
| Core Voltage | — | 1.2 V |
| Speed Grade | — | 8 (commercial) |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), Passive Serial |
| Level ng MSL | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |