EP3SE50F484C4LG vs EP3SE50F484C4L Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F484C4LG sa pamamagitan ng Intel at EP3SE50F484C4L sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SE50F484C4LG | EP3SE50F484C4L |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Stratix® III E | Stratix III E |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 5.49 Mbit (2,886 Kbit M9K + M144K blocks) | 5,760 Kbits (M9K + M144K + MLAB) |
| Maximum User I/O | 296 | — |
| Hardware Multipliers (18x18) | 384 | — |
| PLLs | 4 | 12 |
| Operating Supply Voltage (Core) | 1.1 V | — |
| Hanay ng Temperature na Operasyon | 0°C to +85°C (Commercial) | — |
| Speed Grade | -4 | -4 (performance-oriented) |
| Packhaging | 484-Ball FCBGA, 23 x 23 mm | 484-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Process Node | 40 nm TSMC | — |
| Lead-Free / RoHS | Yes (lead-free finish, RoHS compliant) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| Design Software | Quartus II 11.0 or later | — |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Multipliers (18x18) | — | 384 |
| Maximum User I/Os | — | 296 |
| Process Technology | — | 65 nm CMOS |
| Temperature Grade | — | Commercial (0 C to +85 C) |
| Core Voltage (typical) | — | 0.9 V |
| Lead-Free Finish | — | Yes (L suffix) |