EP3SE50F780C4L vs EP3SE50F780C4N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F780C4L sa pamamagitan ng Intel at EP3SE50F780C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SE50F780C4L EP3SE50F780C4N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Series Stratix III E —
Family Stratix III Stratix III E
Logic Elements (LE) 47,500 47,500
Embedded Memory 5,760,000 bits —
User I/Os 488 —
DSP Blocks (18x18 multipliers) 304 (19x16) 432
Packhaging 780-ball FCBGA (Flip-Chip BGA) 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch
Process Node 40 nm 40 nm
Core Voltage 1.1 V —
Speed Grade C4 (commercial, speed 4) —
Lead-Free (L suffix) Yes —
Configuration Method Passive Serial / Fast Passive Parallel / JTAG / Enhanced —
Temperature na Operasyon [DATA_NEEDED: full industrial/commercial grade] 0C to +85C (C4 commercial grade)
Tindminan RoHS Compliant (lead-free) Lead-free / RoHS compliant
Transceivers [DATA_NEEDED: per Stratix III E variant] —
PLLs [DATA_NEEDED: PLL count] 12 (per family datasheet)
Embedded Memory Bits — 5,760,000
Embedded Memory (M9K/M144K blocks) — 488 (per family datasheet)
Number of LABs — 1900
Maximum User I/Os — 488
Maximum Operating Frequency — 717 MHz
Transceiver Channels — Up to 12 (per family, model-dependent)
Transceiver Data Rate — Up to 6.375 Gbps (per Stratix III E family)
Uri ng Pagpapasok — Surface Mount (BGA)
Volte ng Pagbibigay — Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel
Level ng MSL — 3 (per JEDEC J-STD-020, FBGA package)
Hard Memory Controller — DDR2/DDR3 SDRAM (per Stratix III E family)

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