EP3SE50F780C4L vs EP3SE50F780C4N 比較

詳細並排比較 EP3SE50F780C4L 由 Intel 與 EP3SE50F780C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP3SE50F780C4L EP3SE50F780C4N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
Series Stratix III E —
Family Stratix III Stratix III E
Logic Elements (LE) 47,500 47,500
Embedded Memory 5,760,000 bits —
User I/Os 488 —
DSP Blocks (18x18 multipliers) 304 (19x16) 432
封裝 780-ball FCBGA (Flip-Chip BGA) 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch
Process Node 40 nm 40 nm
Core Voltage 1.1 V —
Speed Grade C4 (commercial, speed 4) —
Lead-Free (L suffix) Yes —
Configuration Method Passive Serial / Fast Passive Parallel / JTAG / Enhanced —
工作溫度 [DATA_NEEDED: full industrial/commercial grade] 0C to +85C (C4 commercial grade)
RoHS 狀態 Compliant (lead-free) Lead-free / RoHS compliant
Transceivers [DATA_NEEDED: per Stratix III E variant] —
PLLs [DATA_NEEDED: PLL count] 12 (per family datasheet)
Embedded Memory Bits — 5,760,000
Embedded Memory (M9K/M144K blocks) — 488 (per family datasheet)
Number of LABs — 1900
Maximum User I/Os — 488
Maximum Operating Frequency — 717 MHz
Transceiver Channels — Up to 12 (per family, model-dependent)
Transceiver Data Rate — Up to 6.375 Gbps (per Stratix III E family)
安裝類型 — Surface Mount (BGA)
供應電壓 — Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel
MSL 等級 — 3 (per JEDEC J-STD-020, FBGA package)
Hard Memory Controller — DDR2/DDR3 SDRAM (per Stratix III E family)

資料表與資源

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