EP3SL200H780I4L vs EP3SL200H780I3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL200H780I4L sa pamamagitan ng Intel at EP3SL200H780I3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL200H780I4L | EP3SL200H780I3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix III L | Stratix III |
| Logic Elements | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 8,000 | — |
| Embedded Memory (Bits) | 10,901,504 | — |
| Maximum User I/O | 488 | — |
| Core Supply Voltage | 0.86 V to 1.15 V | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Internal Performance | 375 MHz | — |
| Packhaging | 780-pin FC-HFBGA (Flip-Chip) | 780-BBGA, FCBGA (HBGA-780) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Transceivers | Up to 24 channels | — |
| Transceiver Data Rate | Up to 6.375 Gbps | — |
| DSP Blocks | 9x9 / 18x18 / 36x36 multipliers | — |
| Memory Interface Support | DDR3, DDR2, DDR, QDR II+, RLDRAM II | — |
| JTAG Support | IEEE Std 1149.1 Boundary-Scan | — |
| Tindminan RoHS | Compliant | — |
| Speed Grade | I4 (Industrial) | — |
| HardCopy Support | Compatible (Lattice-style migration path via HardCopy III) | — |
| Series | — | Stratix III L |
| LABs (Logic Array Blocks) | — | 8000 |
| Total RAM Bits | — | 10,901,504 (10,900 Kb) |
| User I/O Count | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O banks] |
| Embedded Multipliers (DSP blocks) | — | 384 (18x18) |
| PLLs | — | 12 |
| Core Voltage | — | 1.1 V |
| Maximum Operating Frequency | — | 717 MHz |
| Supplier Device Package | — | 780-FBGA (29x29 mm) |
| Lead-Free / RoHS | — | Compliant (lead-free) |