EP610PC-20T vs EP610PC-25T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-20T sa pamamagitan ng Intel at EP610PC-25T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610PC-20T EP610PC-25T
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Family Classic EPLD —
Logic Elements / Macrocells 16 macrocells —
Usable Gates 300 gates —
Propagation Delay (tPD) 20 ns 25 ns (speed grade 25)
Maximum Frequency (fMAX) 62.5 MHz —
Pipelined Data Rate up to 100 MHz up to 100 MHz
Supply Voltage (VCC) 5 V 5 V
Number of Dedicated Inputs 16 —
Number of I/O Pins 16 —
Programmable Output Enable Yes (per macrocell) —
Packhaging 24-pin PDIP (Plastic DIP) PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing)
Uri ng Pagpapasok Through-Hole Through-hole
Temperature na Operasyon 0C to +70C (Commercial) 0 °C to +70 °C (commercial)
Programming Technology UV-erasable EPROM, CMOS —
Development Tool MAX+PLUS II —
Tindminan RoHS unknown [DATA_NEEDED: RoHS status]
Manufacturer — Intel (formerly Altera)
Distributor / Stocking Source — Rochester Electronics, LLC
Device Family — Altera Classic EPLD - EP610
Device Type — Erasable Programmable Logic Device (EPLD, OTP for plastic package)
Logic Capacity — 300 usable gates
Macro Cells — 16
Registers — 16
User I/Os — 16
Maximum Toggle Frequency — [DATA_NEEDED: max fmax]
Process Technology — ECMOS (CMOS, EPROM-based)
Pinout Compatibility — Pin-compatible with EP610DC-25 (CERDIP-24, windowed)
Programming Method — OTP (one-time programmable) via Altera programming hardware
Shipping Form (T suffix) — Tube

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