EP610PC25 vs EP610LC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC25 sa pamamagitan ng Altera at EP610LC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610PC25 | EP610LC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Logic Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Supply Voltage (VCC) | 5 V | — |
| Programming Voltage (VPP) | 12 V | — |
| ICC (typical) | 200 mA | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Packhaging | PDIP-24 | PLCC-28 |
| Uri ng Pagpapasok | Through-Hole | Surface Mount |
| Programmability | One-Time-Programmable (OTP), UV-erasable variant exists | UV-erasable (windowed package) |
| Bilang ng Pin | 24 | — |
| Technology | 5 V CMOS | CMOS |
| Tindminan RoHS | unknown | [DATA_NEEDED] |
| Lifecycle | Obsolete (last shipped ~2000s) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Classic EPLD |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Toggle Frequency | — | 100 MHz |
| Volte ng Pagbibigay | — | 5 V ±5% |
| I/O Pins | — | [DATA_NEEDED: exact I/O count] |