EP910DC-15 vs EP910DM883B Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910DC-15 sa pamamagitan ng Altera at EP910DM883B sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910DC-15 | EP910DM883B |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Classic EPLD - EP910 Series |
| Device Density | 900 usable gates | — |
| Macrocells | 24 | 24 |
| Logic Elements | [DATA_NEEDED: exact LE count] | Combinational + Registered |
| Dedicated Inputs | 12 | — |
| Bidirectional I/O Pins | 12 | — |
| Flip-Flops | 10 | — |
| Product Terms per Macrocells | 24 | — |
| Maximum Propagation Delay (tPD) | 15 ns | — |
| Speed Grade | 15 | — |
| Supply Voltage (VCC) | 5 V (typical) | 5 V |
| Temperature na Operasyon | 0C to +70C (commercial) | -55 °C to +125 °C (military) |
| Technology | CMOS EPROM, UV-erasable | — |
| Packhaging | 24-pin ceramic DIP (DC) | CDIP-40 (Ceramic DIP, 40-pin) |
| Uri ng Pagpapasok | Through-Hole | Through-Hole (DIP) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: not explicitly stated in verified data] | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera (now part of Intel) |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Architecture | — | PAL-type AND-OR-NOT, CMOS |
| Inputs | — | 36 |
| Outputs | — | 24 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 40 ns (typical) |
| Maksimum na Taktiko ng Oras | — | 25 MHz |
| Programming Voltage (VPP) | — | 12.5 V (UV-erase window) |
| MIL Processing | — | MIL-STD-883B Class B |
| Configuration Memory | — | UV-erasable EPROM |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |