EP910IPC-25 vs EP910LI-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910IPC-25 sa pamamagitan ng Intel at EP910LI-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910IPC-25 | EP910LI-20 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Manufacturer | Altera (now Intel) | — |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | Sum-of-products macrocell |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Frequency (fMAX) | 40 MHz | — |
| Dedicated Inputs | 12 | 16 |
| Bidirectional I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| Temperature na Operasyon | 0C to +70C (commercial grade) | -40C to +85C (Industrial) |
| Packhaging | 40-pin PDIP (PDIP-40) | 40-pin Ceramic DIP (Windowed) |
| Uri ng Pagpapasok | Through-Hole | — |
| Programming Method | EPROM cell (OTP / UV erasable) | — |
| Development Tool | MAX+PLUS II | — |
| Maximum Operating Frequency | — | 62 MHz |
| Propagation Delay (tpd) | — | 20 ns |
| I/O Pins | — | 24 |
| Technology | — | CMOS, UV-erasable |
| Package Type | — | Through-Hole, Ceramic DIP with Quartz Window |
| Temperature Grade | — | Industrial (-40C to +85C) |
| Bilang ng Pin | — | 40 |
| Logic Family | — | EPLD (Erasable PLD) |
| Pin/Package Compatibility | — | Pin-compatible across EP910 family |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |