EP910PI-20 vs EP910PI-30T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910PI-20 sa pamamagitan ng Altera at EP910PI-30T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910PI-20 EP910PI-30T
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family Altera Classic EPLD Family —
Macrocells 24 24
Propagation Delay (tPD) 20 ns 30 ns
Packhaging PDIP-40 (PI suffix) —
Uri ng Pagpapasok Through-Hole Through-Hole
Supply Voltage (VCC) 5 V (+/- 5%) 4.75 V to 5.25 V (5 V nominal)
Temperature na Operasyon -40C to +85C (industrial) -40 C to +85 C (industrial)
Technology CMOS EPROM (UV-erasable windowed variants available) CMOS, UV-erasable (windowed ceramic)
Configuration Method Non-volatile EPROM (no boot PROM required) —
Dedicated Inputs 12 10
Bidirectional I/O Pins 24 —
Maximum Counter Frequency 125 MHz —
Output Drive Current (IOL) 24 mA (TTL-compatible) —
Programmable Polarity Yes (XOR gate per macrocell) —
Macrocell Flip-Flop Yes (D-type, programmable) —
Power Dissipation [DATA_NEEDED: typical power dissipation in mW] —
Programming Interface JEDEC file via Altera programming hardware —
Tindminan RoHS unknown [DATA_NEEDED: RoHS status]
MIL-STD-883 Variant EP910DM/883B (separate part number) —
Product Type — EPLD (Erasable Programmable Logic Device)
Family — Altera Classic EPLD
Usable Gates — 480
Register (Clock-to-Output) Delay — 20 ns
Package Type — 40-pin PDIP (ceramic windowed)
Programming — Altera Classic device programmer / MAX+PLUS II flow
Lead-Free — [DATA_NEEDED: lead-free status]

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