EPC16QC-100T vs EPC16C100T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC16QC-100T sa pamamagitan ng Altera at EPC16C100T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC16QC-100T EPC16C100T
Brand Altera Intel
Kategorya Memory ICs FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Uri ng Memory Flash Configuration PROM (in-system programmable) —
Memory Density 16 Mbit (2 Mbyte) —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K —
Configuration Data Width 8-bit or 16-bit (cascaded dual-device mode) —
Configuration Modes Serial (single device), Parallel (two cascaded devices) —
Data Compression Support Yes (35% to 55% bitstream reduction typical) —
JTAG / Boundary Scan IEEE 1149.1 compliant, in-system programmable —
Volte ng Pagbibigay 3.3 V —
Packhaging 100-pin PQFP (20 x 14 mm), 0.65 mm pitch 100-pin PQFP
Temperature na Operasyon [DATA_NEEDED: Operating temperature range] -40C to +85C (industrial)
Cascade Interface nCE / nOE handshake for multi-device chains —
Programming Interface JTAG (IEEE 1149.1) and serial —
Endurance [DATA_NEEDED: Program/erase cycle rating] —
Data Retention [DATA_NEEDED: Data retention specification] —
Tindminan RoHS unknown —
Lead-Free unknown —
Level ng MSL [DATA_NEEDED: Moisture sensitivity level] —
Uri ng Pagpapasok Surface Mount Surface Mount
Laki ng Memory — 16 Mb
Device Type — Enhanced Configuration Device
Supported FPGAs — Stratix, Cyclone, APEX, Mercury (LUT-based)
Configuration Schemes — PS, PPS, FPP, PPA, JTAG
Interface — Serial / Parallel / JTAG (IEEE 1149.1)
Core Voltage — 3.3 V
I/O Voltage — 1.8 V to 3.3 V
Programmability — In-system via JTAG
Lead Pitch — 0.65 mm
Compression Support — Yes (Stratix / Stratix II)
Multi-Device Configuration — Yes (daisy chain)
Remote Update — Yes

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